W83194BR-323 View Datasheet(PDF) - Winbond

Part Name

Description

Manufacturer

W83194BR-323

STEPLESS CLOCK FOR INTEL BROOKDALE CHIPSET

Winbond 

W83194BR-323W83194BG-323

STEPLESS CLOCK FOR INTEL BROOKDALE CHIPSET

Table of Content-

1. GENERAL DESCRIPTION ......................................................................................................... 1

2. PRODUCT FEATURES .............................................................................................................. 1

3. BLOCK DIAGRAM ...................................................................................................................... 2

4. PIN CONFIGURATION ............................................................................................................... 2

5. PIN DESCRIPTION..................................................................................................................... 3

5.1 Crystal I/O.................................................................................................................................3

5.2 CPU, 3V66, and PCI Clock Outputs........................................................................................3

5.3 I2C Control Interface .................................................................................................................4

5.4 Fixed Frequency Outputs.........................................................................................................4

5.5 Power Pins................................................................................................................................5

6. FREQUENCY SELECTION BY HARDWARE OR SOFTWARE ................................................ 6

7. I2C CONTROL AND STATUS REGISTERS .............................................................................. 7

7.1 Register 0: Frequency Select Register (default = 0)...............................................................7

7.2 Register 1: CPU Clock Register (1 = enable, 0 = Stopped) ...................................................7

7.3 Register 2: PCI Clock Register (1 = enable, 0 = Stopped) .....................................................7

7.4 Register 3: PCI, 48MHz Clock Register (1 = enable, 0 = Stopped) .......................................8

7.5 Register 4: 3V66 Control Register (1 = enable, 0 = Stopped)................................................8

7.6 Register 5: Watchdog Control Register...................................................................................8

7.7 Register 6: Watchdog Timer Register .....................................................................................9

7.8 Register 7: M/N Program Register ..........................................................................................9

7.9 Register 8: M/N Program Register ..........................................................................................9

7.10 Register 9: Spread Spectrum Programming Register ..........................................................10

7.11 Register 10: Divisor and Step-less Enable and Skew Control Register...............................10

7.12 Register 11: Winbond Chip ID Register (Read Only).........................................................11

7.13 Register 12: Winbond Chip ID Register (Read Only).........................................................11

7.14 Register 13: Reserved ...........................................................................................................11

7.15 Register 14: CPU to PCI Skew Control .................................................................................12

7.16 Register 15: SEL24_48 and SEL48_66 Control ...................................................................12

8. ACCESS INTERFACE .............................................................................................................. 13

8.1 Block Write protocol ...............................................................................................................13

8.2 Block Read protocol ...............................................................................................................13

8.3 Byte Write protocol .................................................................................................................13

8.4 Byte Read protocol.................................................................................................................13

9. ORDERING INFORMATION..................................................................................................... 14

10. HOW TO READ THE TOP MARKING...................................................................................... 14

11. PACKAGE DRAWING AND DIMENSIONS.............................................................................. 15

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