W83194BR-323 View Datasheet(PDF) - Winbond
Part Name
Description
Manufacturer
W83194BR-323 Datasheet PDF : 18 Pages
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W83194BR-323W83194BG-323
STEPLESS CLOCK FOR INTEL BROOKDALE CHIPSET
5. PIN DESCRIPTION
BUFFER TYPE SYMBOL
IN
INtd120k
OUT
OD
I/O
I/OD
#
*
&
DESCRIPTION
Input
Input pin and internal 120K pull down
Output
Open Drain
Bi-directional Pin
Bi-directional Pin, Open Drain
Active Low
Internal 120kΩ pull-up
Internal 120kΩ pull-down
5.1 Crystal I/O
PIN
PIN NAME
3
XIN
4
XOUT
TYPE
DESCRIPTION
IN
OUT
Crystal input with internal loading capacitors (18pF) and
feedback resistors.
Crystal output at 14.318MHz nominally with internal loading
capacitors (18pF).
5.2 CPU, 3V66, and PCI Clock Outputs
PIN
41,38,
40,37
45,44
31,30,28
27
35
20
19
PIN NAME
CPUCLK_T [0:2]
CPUCLK_C [0:2]
TYPE
DESCRIPTION
OUT Low skew (< 250ps) differential clock outputs for host
frequencies of CPU and chipset.
3V66_0:2
OUT 3.3V 66MHz clock outputs.
3V66_3 / 48MHz
*SEL48_66
IREF
RESET#
OUT 3V66_3 or 48MHz clock output.
INtp120k Latched input for 48MHz or 66MHz select pin. This is internal
120K pull up default 66MHz. In power on reset period, it is a
hardware-latched pin, and it can be R/W by I2C control after
power on reset period. Select by register 16 bit 6.
IN Deciding the reference current for the CPUCLK pairs.
The pin was connected to the precision resistor tied to
ground to decide the appropriate current. There are
several modes to select different current via power on
trapping the Pin 1 & 48 (MULTISEL0, 1). The table is
show as follows.
OD System reset signal when the watchdog is time out. This pin
will generate 250ms low phase when the watchdog timer is
timeout.
VTTPWRGD# IN
Power good input signal comes from ACPI with low active.
This 3.3V input is level sensitive strobe used to determine FS
[4:0] and MULTISEL0, MULTISEL1, input are valid and is
ready to sampled. This pin is low active.
Publication Release Date: March 2006
-3-
Revision 2.1
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