W83194BR-911, W83194BG-911
STEPLESS CLOCK FOR VIA PT/PM CHIPSET
5. PIN DESCRIPTION
BUFFER TYPE SYMBOL
IN
INtp120k
INtd120k
OUT
OD
I/O
I/OD
#
*
&
DESCRIPTION
Input
Latched input at power up, internal 120kΩ pull up.
Latched input at power up, internal 120kΩ pull down.
Output
Open Drain
Bi-directional Pin
Bi-directional Pin, Open Drain.
Active Low
Internal 120kΩ pull-up
Internal 120 kΩ pull-down
5.1 Crystal I/O
PIN
PIN NAME
5
XIN
6
XOUT
TYPE
DESCRIPTION
IN
OUT
Crystal input with internal loading capacitors (18pF) and
feedback resistors.
Crystal output at 14.318MHz nominally with internal loading
capacitors (18pF).
5.2 CPU, AGP, and PCI Clock Outputs
PIN
PIN NAME
TYPE
DESCRIPTION
CPUCLKT [0:1]
43,40,42,39
CPUCLKC [0:1]
OUT
Low skew (< 250ps) differential clock outputs for host
frequencies of CPU
31,30,27 AGP0: 2
OUT 3.3V AGP clock outputs.
PCI_F0
8
FS2&
OUT 3.3V PCI free running clock output.
INtd120k
Latched input for FS2 at initial power up for H/W selecting
the output frequency. This is internal 120K pull down.
PCI_F1
9
FS4&
OUT 3.3V PCI free running clock output.
INtd120k
Latched input for FS4 at initial power up for H/W selecting
the output frequency, This is internal 120K pull down.
PCI0
OUT 3.3V PCI clock output.
13
MODE&
Latched input for pin 20,21 at initial power up selecting the
INtd120k 0=PCI5, PCI6 clock output, 1=PCI_STOP and CPU _STOP
control pin. This is internal 120KΩ pull down.
PCI_F2
OUT 3.3V PCI free running clock output.
Publication Release Date: March 2006
-3-
Revision 0.71