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ADV7175 View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
ADV7175 Datasheet PDF : 36 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AC CHARACTERISTICS1
Parameter
Chroma Nonlinear Gain
Chroma Nonlinear Phase
Chroma Nonlinear Phase
Chroma/Luma Intermod
Chroma/Luma Intermod
Chroma/Luma Gain Ineq
Chroma/Luma Delay Ineq
Luminance Nonlinearity
Chroma AM Noise
Chroma PM Noise
Min Typ Max
0.6
1
1.7
0.2
0.4
0.6
1
0.8
60
59
ADV7175/ADV7176
Units Condition
± % Referenced to 40 IRE
±°
NTSC
±°
PAL
± % Referenced to 714 mV (NTSC)
± % Referenced to 700 mV (PAL)
±%
ns
±%
dB
dB
TIMING–SPECIFICATIONS2 (VAA = +5 V3, VREF = 1.235 V RSET = 150 . All specifications TMIN to TMAX4 unless otherwise noted)
Parameter
Min Typ Max
Units Condition
MPU PORT1
SCLOCK Frequency
SCLOCK High Pulse Width, t1
SCLOCK Low Pulse Width, t2
Hold Time (Start Condition), t3
Setup Time (Start Condition), t4
Data Setup Time, t5
SDATA, SCLOCK Rise Time, t6
SDATA, SCLOCK Fall Time, t7
Setup Time (Stop Condition), t8
ANALOG OUTPUTS1, 5
Analog Output Delay
DAC Analog Output Skew
0
100
4.0
4.7
4.0
4.7
250
1
300
4.7
5
0
kHz
µs
µs
µs
After this period the first clock pulse is generated
µs
Relevant for repeated start condition.
ns
µs
ns
µs
ns
ns
CLOCK CONTROL
AND PIXEL PORT6
FCLOCK
Clock High Time t9
Clock Low Time t10
Data Setup Time t11
Data Hold Time t12
Control Setup Time t11
Control Hold Time t12
Digital Output Access Time t13
Digital Output Hold Time t14
Pipeline Delay t15
24.52 27 29.5
8
8
3.5
1
4
2
24
6
37
MHz
ns
ns
ns
ns
ns
ns
ns
ns
Clock Cycles
NOTES
1Guaranteed by characterization.
2TTL input values are 0 to 3 volts, with input rise/fall times 3 ns, measured between the 10% and 90% points. Timing reference points at 50% for inputs and
outputs. Analog Output Load 3 pF.
3± 5% for all versions.
4Temperature range (TMIN to TMAX); 0°C to +70°C.
5Output delay measured from the 50% point of the rising edge of CLOCK to the 50% point of full-scale transition.
6Pixel Port consists of the following inputs:
Pixel Inputs: P15–P0
Pixel Controls: HSYNC, FIELD/VSYNC, BLANK
Clock Input: CLOCK
Specifications subject to change without notice.
REV. A
–3–

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