XRT73L02M View Datasheet(PDF) - Exar Corporation
Part Name
Description
Manufacturer
XRT73L02M Datasheet PDF : 46 Pages
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XRT73L02M
TWO CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT
xr
REV. 1.0.0
CLOCK INTERFACE
PIN #
SIGNAL NAME
66
E3CLK
63
DS3CLK
60 STS-1CLK/ 12M
99
SFM_EN
80
CLKOUT_0
46
CLKOUT_1
45
CLKOUT_EN
TYPE
I
I
I
I
O
I
DESCRIPTION
E3 Clock Input (34.368 MHz ± 20 ppm):
If any of the channels is configured in E3 mode, a reference clock 34.368 MHz is
applied on this pin.
NOTE: In single frequency mode, this reference clock is not required.
DS3 Clock Input (44.736 MHz ± 20 ppm):
If any of the channels is configured in DS3 mode, a reference clock 44.736 MHz.
is applied on this pin.
NOTE: In single frequency mode, this reference clock is not required.
STS-1 Clock Input (51.84 MHz ± 20 ppm):
If any of the channels is configured in STS-1 mode, a reference clock 51.84
MHz is applied on this pin..
In Single Frequency Mode, a reference clock of 12.288 MHz ± 20 ppm is con-
nected to this pin and the internal clock synthesizer generates the appropriate
clock frequencies based on the configuration of the channels in E3, DS3 or
STS-1.
Single Frequency Mode Enable:
Tie this pin “High” to enable the Single Frequency Mode. A reference clock of
12.288 MHz ± 20 ppm is applied. This offers the flexibility of using a low cost ref-
erence clock and configures the board for either E3 or DS3 or STS-1 without the
need to change any components on the board.
Tie this pin “Low” if single frequency mode is not selected. In this case, the
appropriate reference clocks must be provided.
NOTE: This pin is internally pulled down
Clock output for channel 0
Clock output for channel 1
Low jitter clock is output for each channel based on the mode selection
(E3,DS3 or STS-1) if the CLK_EN_n bit is set in the control register or
CLKOUT_EN pin is tied “High”.
This eliminates the need for a separate clock source for the framer.
NOTES:
1. The maximum drive capability for the clockouts is 16 mA.
Clock Output Enable in Single Frequency Mode:
Tie this pin “High” to enable the output clocks via the CLKOUT pins.
8
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