Z89C00 View Datasheet(PDF) - Zilog
Part Name
Description
Manufacturer
Z89C00 Datasheet PDF : 28 Pages
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ZILOG
REGISTERS (Continued)
PRELIMINARY
Z89C00
16-BIT DIGITAL SIGNAL PROCESSOR
N OV Z C UI1 UI0 SH3 OP IE UO1 UO0
RPL
S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0
Ram Pointer Loop Size
000
256
001
2
010
4
011
8
100
16
101
32
110
64
111
128
"Short Form Direct" bits
User Output 0-1
Interrupt Enable
Read
and
Write
Overflow protection
MPY output shifted right
by 3 bit with sign extension
User Input 0-1
Carry
Zero
Overflow
Negative
Read Only
Figure 3. Status Register
SR is the status register (Figure 3) which contains the ALU
status and certain control bits as shown in the following
table.
Status
Register Bit
S15 (N)
S14 (OV)
S13 (Z)
S12 (L)
S11 (UI1)
S10 (UI0)
S9 (SH3)
S8 (OP)
S7 (IE)
S6 (UO1)
S5 (UO0)
S4-3
S2-0 (RPL)
Function
ALU Negative
ALU Overflow
ALU Zero
Carry
User Input 1
User Input 0
MPY Output Shifted Right by Three Bits
Overflow Protection
Interrupt Enable
User Output 1
User Output 0
“Short Form Direct” Bits
RAM Pointer Loop Size
RPL Description
S2
S1
S0
Loop Size
0
0
0
256
0
0
1
2
0
1
0
4
0
1
1
8
1
0
0
16
1
0
1
32
1
1
0
64
1
1
1
128
The status register may always be read in its entirety.
S15-S10 are set/reset by the hardware and can only be
read by software. S9-S0 can be written by software.
8
DC 4083-00
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