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ADRF6510-EVALZ View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
ADRF6510-EVALZ Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADRF6510
Parameter
IMD3
IMD3 with Input CW Blocker
30 MHz Corner Frequency
Output Noise Density
Second Harmonic, HD2
Third Harmonic, HD3
IMD3
IMD3 with Input CW Blocker
DIGITAL LOGIC
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINH/IINL
Input Capacitance, CIN
SPI TIMING
fSCLK
tDH
tDS
tLH
tLS
tPW
tD
POWER AND ENABLE
Supply Voltage Range
Total Supply Current
Disable Current
Disable Threshold
Enable Response Time
Disable Response Time
Test Conditions/Comments
Min
f1 = 500 kHz, f2 = 550 kHz, 1.5 V p-p composite
output voltage
Gain = 5 dB
Gain = 35 dB
f1 = 500 kHz, f2 = 550 kHz, 1.5 V p-p composite
output, gain = 5 dB; blocker at 5 MHz, 10 dBc
relative to two-tone composite output voltage
Midband, gain = 0 dB
Midband, gain = 20 dB
Midband, gain = 40 dB
8 MHz fundamental, 1.5 V p-p output voltage
Gain = 0 dB
Gain = 40 dB
8 MHz fundamental, 1.5 V p-p output voltage
Gain = 0 dB
Gain = 40 dB
f1 = 15 MHz, f2 = 16 MHz, 1.5 V p-p composite
output voltage
Gain = 5 dB
Gain = 35 dB
f1 = 15 MHz, f2 = 16 MHz, 1.5 V p-p composite
output, gain = 5 dB; blocker at 150 MHz, 10 dBc
relative to two-tone composite output voltage
LE, CLK, DATA, SDO, OFDS, GNSW
LE, CLK, DATA, SDO
1/tSCLK
DATA hold time
DATA setup time
LE hold time
LE setup time
CLK high pulse width
CLK to SDO delay
VPS, VPSD, COM, COMD, ENBL
4.75
ENBL = 5 V
Maximum bandwidth setting
Minimum bandwidth setting
ENBL = 0 V
Delay following ENBL low-to-high transition
Delay following ENBL high-to-low transition
Typ
Max
Unit
61
dBc
57
dBc
40
dBc
−130
−130
−123
63
84
54
87
59
77.5
55
dBV/√Hz
dBV/√Hz
dBV/√Hz
dBc
dBc
dBc
dBc
dBc
dBc
dBc
>2
V
<0.8
V
<1
μA
2
pF
20
MHz
5
ns
5
ns
5
ns
5
ns
5
ns
5
ns
5.0
5.25
V
258
mA
131
mA
2
mA
2.5
V
20
μs
300
ns
Rev. 0 | Page 4 of 28

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