93AA86A View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
93AA86A Datasheet PDF : 26 Pages
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93AA86A/B/C, 93LC86A/B/C, 93C86A/B/C
2.9 WRITE ALL (WRAL)
The Write All (WRAL) instruction will write the entire
memory array with the data specified in the command.
The self-timed auto-erase and programming cycle is
initiated by the rising edge of CLK on the last data bit.
Clocking of the CLK pin is not necessary after the
device has entered the WRAL cycle. The WRAL
command does include an automatic ERAL cycle for
the device. Therefore, the WRAL instruction does not
require an ERAL instruction but the chip must be in the
EWEN status.
FIGURE 2-7:
WRAL TIMING
CS
CLK
The DO pin indicates the READY/BUSY status of the
device if CS is brought high after a minimum of 250 ns
low (TCSL).
Note:
Issuing a Start bit and then taking CS low
will clear the READY/BUSY status from
DO.
VCC must be ≥ 4.5V for proper operation of WRAL.
TCSL
DI
1
0
0
0
1
X ••• X Dx ••• D0
TSV
TCZ
HIGH-Z
DO
BUSY READY
HIGH-Z
TWL
DS21797D-page 10
2004 Microchip Technology Inc.
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