LTC1143/LTC1143L
LTC1143L-ADJ
APPLICATIONS INFORMATION
5) Is the VIN decoupling capacitor (1µF, 0.1µF) con-
nected closely between Pin 13 (5) and GND Pin 3
(11)? This capacitor carries the MOSFET driver peak
currents.
6) For the LTC1143 and LTC1143L, are the SHUT-
DOWN Pins 2 and 10 actively pulled to ground
during normal operation? Both SHUTDOWN pins are
high impedance and must not be allowed to float. Both
pins can be driven by the same external signal if
needed.
7) For the LTC1143L-ADJ, are the VFB Pins 2 and 10
decoupled with 100pF as close to the device as
possible? The VFB line is sensitive to noise pickup and
should be kept away from the P-channel MOSFET.
+
VIN5
–
1k
CT3
0.0033µF
P-CH
CIN5
L1
D1
SHUTDOWN
VIN3
(5V OUTPUT)
RSENSE5
COUT5
+
VOUT5
–
1000pF*
0.22µF*
1000pF*
0.22µF*
SHUTDOWN
(3.3V OUTPUT)
VIN5
CT5
RSENSE3
L2
+
VOUT3
–
COUT3
*MUST BE LOCATED CLOSE TO LTC1143
BOLD LINES INDICATE HIGH CURRENT PATHS
P-CH
D2
1k
0.0033µF
CIN3
+
VIN3
–
1143 F09
Figure 9. LTC1143 Layout Diagram (see Board Layout Checklist)
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