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SAK-XC2765X-72F80LAA View Datasheet(PDF) - Infineon Technologies

Part Name
Description
Manufacturer
SAK-XC2765X-72F80LAA Datasheet PDF : 63 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
XC27x5X Derivatives
XC2000 Family / Base Line
Short Errata Description
Table 7 Functional Deviations (cont’d)
Functional
Deviation
Short Description
Chg Pg
ESR_X.004
Wrong Value of SCU_RSTCONx Registers New 29
after ESRy Application Reset
GPT12E_X.002 Effects of GPT Module Microarchitecture
30
HARR_X.001
Not Requested HARR after User Reset
32
OCDS_X.003
Peripheral Debug Mode Settings cleared
32
by Reset
PAD_X.001
Additional Edges in the Input Signal
New 33
PARITY_X.001 PMTSR Register Initialization
37
RESET_X.003
P2.[2:0] and P10.[12:0] Switch to Input
38
RESET_X.004
Sticky “Register Access Trap” forces
New 38
device into power-save mode after reset.
SCU_X.012
Wake-Up Timer RUNCON Command
New 39
StartUp_X.001 RAM Initialization before ECC/Parity
39
Activation
StartUp_X.003
Debug Interface Configuration from Flash New 40
can Fail Upon Power-On
USIC_AI.004
Receive shifter baudrate limitation
41
USIC_AI.005
Only 7 data bits are generated in IIC mode
42
when TBUF is loaded in SDA hold time
USIC_AI.016
Transmit parameters are updated during New 42
FIFO buffer bypass
WDT_X.002
Clearing the Internal Flag which Stores
43
Preceding WDT Reset Request
Errata Sheet
17
V1.5, 2013-02

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