SAK-XC2765X-72F80LAA View Datasheet(PDF) - Infineon Technologies

Part Name

Description

Manufacturer

SAK-XC2765X-72F80LAA

16/32-Bit Single-Chip Microcontroller with 32-Bit Performance XC2000 Family / Base Line

Infineon Technologies 

XC27x5X Derivatives

XC2000 Family / Base Line

Detailed Errata Description

2. An explicit software write operation (i.e. no context switch) to L1 and/or L2 is

performed, and

3. The Context Pointer (register CP) is modified (e.g. by MOV/POP/SCXT CP,

... ) in one of the following instructions, leading to a context store (old

context) and a context load (new context) of the global bank into/from

DPRAM, and

4. One of the General Purpose Registers Rx with an odd register number x

(x = 1, 3, .., 15) is loaded from locations L1 or L2.

In this case, the contents of Rx may be incorrect.

This scenario may typically occur at the beginning of interrupt routines when a

GPR (e.g. R15 used as user stack pointer) is saved into the new GPR context

in DPRAM, as shown in the following Figure 1.

Errata Sheet

24

V1.5, 2013-02

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