MCF53015(2009) View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

MCF53015
(Rev.:2009)

MCF5301x Data Sheet

Freescale Semiconductor 

Hardware Design Considerations

3.2 USB Power Filtering

To minimize noise, external filters are required for each of the USB power pins. The filter shown in Figure 2 should be

connected between the board EVDD and each of the USBVDD pins. The resistor and capacitors should be placed as close to the

dedicated USBVDD pin as possible.

Board EVDD

0Ω

10 µF

0.1 µF

USB VDD Pin

GND

Figure 2. USB VDD Power Filter

NOTE

In addition to the above filter circuitry, a 0.01 F capacitor is also recommended in parallel

with those shown.

3.3 Supply Voltage Sequencing

Figure 3 shows situations in sequencing the I/O VDD (EVDD), SDRAM VDD (SDVDD), PLL VDD (PVDD), and internal logic /

core VDD (IVDD). The relationship between SDVDD and EVDD is non-critical during power-up and power-down sequences.

Both SDVDD (2.5V or 1.8V) and EVDD are specified relative to IVDD.

3.3V

2.5V

1.8V

1.2V

1

Supplies Stable

EVDD, USBVDD (3.3V)

SDVDD (2.5V - DDR)

SDVDD (1.8V - DDR)

IVDD, PVDD

2

0

Time

Notes:

1 IVDD should not exceed EVDD, SDVDD or PVDD by more than 0.4V at any time, including power-up.

2 Recommended that IVDD/PVDD should track EVDD/SDVDD up to 0.9V then separate for completion of ramps

3 Input voltage must not be greater than the supply voltage (EVDD, SDVDD, IVDD, or PVDD) by more than 0.5V

at any time, including during power-up.

4 Use 1 microsecond or slower rise time for all supplies.

Figure 3. Supply Voltage Sequencing and Separation Cautions

MCF5301x Data Sheet, Rev. 3

6

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

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