Pin Assignments and Reset States
Signal Name
RESET
RSTOUT
EXTAL
XTAL
BOOTMOD[1:0]
FB_A[23:22]
FB_A[21:16]
FB_A[15:14]
FB_A[13:11]
FB_A10
FB_A[9:0]
FB_D[31:16]
FB_D[15:0]
FB_CLK
FB_BE/BWE[3:0]
FB_CS[5:4]
FB_CS1
FB_CS0
FB_OE
FB_TA
FB_R/W
FB_TS
SD_A10
Table 6. MCF5301x Signal Information and Muxing
GPIO
Alternate 1
Alternate 2
MCF53010
MCF53011
MCF53012
MCF53013
MCF53014
MCF53015
MCF53016
MCF53017
—
—
—
—
—
—
—
—
—
—
—
—
—
—
PBE[3:0]
PCS[5:4]
PCS1
PCS0
PFBCTL3
PFBCTL2
PFBCTL1
PFBCTL0
—
—
—
—
—
—
FB_CS[3:2]
—
SD_BA[1:0]
SD_A[13:11]
—
SD_A[9:0]
Reset
—
—
Clock
—
—
Mode Selection
—
FlexBus
—
—
—
—
—
—
SD_D[31:16]
—
FB_D[31:16]
—
—
—
SD_DQM[3:0]
—
—
—
SD_CS1
—
FB_CS4
—
—
—
—
—
—
—
DACK0
—
SDRAM Controller
—
—
208 LQFP
256 MAPBGA
U
I EVDD
41
M3
—
O EVDD
42
N1
—
I EVDD
49
T2
U3
O EVDD
50
T3
—
I EVDD
55, 17
J5, G5
—
O SDVDD
115, 114
P16, N16
—
O SDVDD
113–108
R16, N14, N15, P15-13
—
O SDVDD
107, 106
R15, R14
—
O SDVDD
105–103
N13, R12, R13
—
O SDVDD
100
N12
—
O SDVDD
99–97
95–89
P12, T14, T15, R11, P11,
N11, T13, R10, T11, T12
—
I/O SDVDD 208–198, 57–62, B3, A2, D6, C5, B4, A3,
64, 65
B5, C6, D12, C14, B14,
C13, D11, B13, A14, A13
—
I/O SDVDD 182–189, 177–170 B9, A9, A8, D7, B8, C8,
D8, B7, C10, A10, B10,
D10, C11, A11, B11, A12
—
O SDVDD
153
D13
—
O SDVDD 197, 166, 179, 178
A4, B12, C9, D9
—
O SDVDD
—
B6, C7
—
O SDVDD
5
D2
—
O SDVDD
6
C2
—
O SDVDD
1
D4
U
I SDVDD
3
B2
—
O SDVDD
2
C3
—
O SDVDD
4
D3
—
O SDVDD
206
C4
MCF5301x Data Sheet, Rev. 5
10
Preliminary—Subject to Change Without Notice
Freescale Semiconductor