16C554 View Datasheet(PDF) - Microchip Technology

Part Name

Description

Manufacturer

16C554

EPROM-Based 8-Bit CMOS Microcontrollers

Microchip Technology 

PIC16C55X

TABLE 4-1: SPECIAL REGISTERS FOR THE PIC16C55X

Address

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

Value on Detail on

POR Reset Page:

Bank 0

00h

INDF

01h

TMR0

02h

PCL

03h

STATUS

04h

FSR

05h

PORTA

06h

PORTB

07h

PORTC(4)

08h

—

Addressing this location uses contents of FSR to address data memory (not a xxxx xxxx 21

physical register)

Timer0 Module’s Register

xxxx xxxx 47

Program Counter's (PC) Least Significant Byte

0000 0000 21

IRP(2) RP1(2) RP0

TO

PD

Z

DC

C 0001 1xxx 17

Indirect data memory address pointer

xxxx xxxx 21

—

—

—

RA4 RA3 RA2 RA1 RA0 ---x xxxx 23

RB7

RB6

RB5 RB4 RB3 RB2 RB1 RB0 xxxx xxxx 25

RC7

RC6

RC5 RC4 RC3 RC2 RC1 RC0 xxxx xxxx

27

Unimplemented

—

—

09h

0Ah

0Bh

0Ch

0Dh-1Eh

1Fh

Bank 1

80h

—

PCLATH

INTCON

—

—

—

INDF

Unimplemented

—

—

GIE

(3)

Unimplemented

Unimplemented

Unimplemented

—

—

— Write buffer for upper 5 bits of program counter ---0 0000 21

T0IE INTE RBIE T0IF INTF RBIF 0000 000x 19

—

—

—

—

—

—

Addressing this location uses contents of FSR to address data memory (not a xxxx xxxx 21

physical register)

81h

OPTION

RBPU INTEDG T0CS T0SE PSA PS2 PS1 PS0 1111 1111 18

82h

PCL

Program Counter's (PC) Least Significant Byte

0000 0000 21

83h

STATUS

—

—

RP0

TO

PD

Z

DC

C 0001 1xxx 17

84h

FSR

Indirect data memory address pointer

xxxx xxxx 21

85h

TRISA

—

—

— TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 ---1 1111 23

86h

TRISB

TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 1111 1111 25

87h

TRISC(4)

TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 1111 1111 27

88h

—

Unimplemented

—

—

89h

—

Unimplemented

—

—

8Ah

PCLATH

—

—

— Write buffer for upper 5 bits of program counter ---0 0000 21

8Bh

INTCON

GIE

(3)

T0IE INTE RBIE T0IF INTF RBIF 0000 000x 19

8Ch

—

Unimplemented

—

—

8Dh

—

Unimplemented

—

—

8Eh

PCON

—

—

—

—

—

—

POR

— ---- --0- 20

8Fh-9Eh

—

Unimplemented

—

—

9Fh

—

Unimplemented

—

—

Legend: — = Unimplemented locations read as ‘0’, u = unchanged, x = unknown, q = value depends on condition, 

shaded = unimplemented

Note 1: Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation.

2: IRP & RP1 bits are reserved, always maintain these bits clear.

3: Bit 6 of INTCON register is reserved for future use. Always maintain this bit as clear.

4: PIC16C557 only.

DS40143E-page 16

Preliminary

 1996-2013 Microchip Technology Inc.

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