ADM1026JST-REEL7 View Datasheet(PDF) - ON Semiconductor
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ADM1026JST-REEL7 Datasheet PDF : 55 Pages
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ADM1026
Data can only be written to unprogrammed EEPROM
locations. To write new data to a programmed location, it is
first necessary to erase it. EEPROM erasure cannot be done
at the byte level; the EEPROM is arranged as 128 pages of
64 bytes, and an entire page must be erased. Note that of
these 128 pages, only 124 pages are available to the user. The
last four pages are reserved for manufacturing purposes and
cannot be erased/rewritten.
The EEPROM has three RAM registers associated with it,
EEPROM Registers 1, 2, and 3 at Addresses 06h, 0Ch, and
13h. EEPROM Registers 1 and 2 are for factory use only.
EEPROM Register 3 sets up the EEPROM operating mode.
Setting Bit 0 of EEPROM Register 3 puts the EEPROM into
read mode. Setting Bit 1 puts it into programming mode.
Setting Bit 2 puts it into erase mode.
Only one of these bits must be set before the EEPROM
may be accessed. Setting no bits or more than one of them
causes the device to respond with No Acknowledge if an
EEPROM read, program, or erase operation is attempted.
It is important to distinguish between SMBus write
operations, such as sending an address or command, and
EEPROM programming operations. It is possible to write an
EEPROM address over the SMBus, whatever the state of
EEPROM Register 3. However, EEPROM Register 3 must
be correctly set before a subsequent EEPROM operation can
be performed. For example, when reading from the
EEPROM, Bit 0 of EEPROM Register 3 can be set, even
though SMBus write operations are required to set up the
EEPROM address for reading. Bit 3 of EEPROM Register 3
is used for EEPROM write protection. Setting this bit
prevents accidental programming or erasure of the
EEPROM. If an EEPROM write or erase operation is
attempted when this bit is set, the ADM1026 responds with
No Acknowledge. This bit is write−once and can only be
cleared by a power−on reset.
EEPROM Register 3 Bit 7 is used for clock extend.
Programming an EEPROM byte takes approximately
250 ms, which would limit the SMBus clock for repeated or
block write operations. Because EEPROM block read/write
access is slow, it is recommended that this clock extend bit
typically be set to 1. This allows the ADM1026 to pull SCL
low and extend the clock pulse when it cannot accept any
more data.
ADM1026 SMBus Operations
The SMBus specifications define several protocols for
different types of read and write operations. The ones used
in the ADM1026 are discussed below. The following
abbreviations are used in the diagrams:
S—START
W—WRITE
P—STOP
A—ACKNOWLEDGE
R—READ
A—NO ACKNOWLEDGE
ADM1026 Write Operations
Send Byte
In this operation, the master device sends a single
command byte to a slave device, as follows:
1. The master device asserts a start condition on the
SDA.
2. The master sends the 7−bit slave address followed
by the write bit (low).
3. The addressed slave device asserts an ACK on the
SDA.
4. The master sends a command code.
5. The slave asserts ACK on the SDA.
6. The master asserts a stop condition on the SDA
and the transaction ends.
In the ADM1026, the send byte protocol is used to write
a register address to RAM for a subsequent single−byte read
from the same address or block read or write starting at that
address. This is illustrated in Figure 18.
1
2
3
4
56
S
SLAVE
ADDRESS
W
A
RAM
ADDRESS
(00h TO 6Fh)
A
P
Figure 18. Setting a RAM Address for Subsequent Read
If it is required to read data from the RAM immediately
after setting up the address, the master can assert a repeat
start condition immediately after the final ACK and carry
out a single byte read, block read, or block write operation
without asserting an intermediate stop condition.
Write Byte/Word
In this operation, the master device sends a command byte
and one or two data bytes to the slave device as follows:
1. The master device asserts a start condition on the
SDA.
2. The master sends the 7−bit slave address followed
by the write bit (low).
3. The addressed slave device asserts an ACK on the
SDA.
4. The master sends a command code.
5. The slave asserts an ACK on the SDA.
6. The master sends a data byte.
7. The slave asserts an ACK on the SDA.
8. The master sends a data byte (or may assert stop
here.)
9. The slave asserts an ACK on the SDA.
10. The master asserts a stop condition on the SDA to
end the transaction.
In the ADM1026, the write byte/word protocol is used for
four purposes. The ADM1026 knows how to respond by the
value of the command byte and EEPROM Register 3.
The first purpose is to write a single byte of data to RAM.
In this case, the command byte is the RAM address from 00h
to 6Fh and the (only) data byte is the actual data. This is
illustrated in Figure 19.
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