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ADP7102ACPZ-R7(RevA) View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
ADP7102ACPZ-R7
(Rev.:RevA)
ADI
Analog Devices ADI
ADP7102ACPZ-R7 Datasheet PDF : 28 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADP7102
Data Sheet
Parameter
Symbol Conditions
Min
PROGRAMMABLE EN/UVLO
UVLO Threshold rising
UVLORISE 3.3 V ≤ VIN ≤ 20 V, TJ = −40°C to +125°C
1.18
UVLO Threshold falling
UVLOFALL
3.3 V ≤ VIN ≤ 20 V, TJ = −40°C to +125°C, 10 kΩ
in series with enable pin
UVLO Hysteresis Current
UVLOHYS
VEN > 1.25 V, TJ = −40°C to +125°C
7.5
Enable Pulldown Current
IEN-IN
EN = VIN
INPUT VOLTAGE
Start Threshold
VSTART
TJ = −40°C to +125°C
Shutdown Threshold
VSHUTDOWN TJ = −40°C to +125°C
2.45
Hysteresis
OUTPUT NOISE
OUTNOISE
10 Hz to 100 kHz, VIN = 5.5 V, VOUT = 1.8 V
10 Hz to 100 kHz, VIN = 6.3 V, VOUT = 3.3 V
10 Hz to 100 kHz, VIN = 8 V, VOUT = 5 V
10 Hz to 100 kHz, VIN = 12 V, VOUT = 9 V
10 Hz to 100 kHz, VIN = 5.5 V, VOUT = 1.5 V,
adjustable mode
10 Hz to 100 kHz, VIN = 12 V, VOUT = 5 V,
adjustable mode
10 Hz to 100 kHz, VIN = 18 V, VOUT = 15 V,
adjustable mode
POWER SUPPLY REJECTION RATIO PSRR
100 kHz, VIN = 4.3 V, VOUT = 3.3 V
100 kHz, VIN = 6 V, VOUT = 5 V
10 kHz, VIN = 4.3 V, VOUT = 3.3 V
10 kHz, VIN = 6 V, VOUT = 5 V
100 kHz, VIN = 3.3 V, VOUT = 1.8 V, adjustable mode
100 kHz, VIN = 6 V, VOUT = 5 V, adjustable mode
100 kHz, VIN = 16 V, VOUT = 15 V, adjustable mode
10 kHz, VIN = 3.3 V, VOUT = 1.8 V, adjustable mode
10 kHz, VIN = 6 V, VOUT = 5 V, adjustable mode
10 kHz, VIN = 16 V, VOUT = 15 V, adjustable mode
Typ Max
1.23 1.28
1.13
9.8 12
500
3.2
250
15
15
15
15
18
30
65
50
50
60
60
50
60
60
60
80
80
Unit
V
V
µA
nA
V
V
mV
µV rms
µV rms
µV rms
µV rms
µV rms
µV rms
µV rms
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
1 Based on an end-point calculation using 1 mA and 300 mA loads. See Figure 6 for typical load regulation performance for loads less than 1 mA.
2 Dropout voltage is defined as the input-to-output voltage differential when the input voltage is set to the nominal output voltage. This applies only for output
voltages above 3.0 V.
3 Start-up time is defined as the time between the rising edge of EN to VOUT being at 90% of its nominal value.
4 Current-limit threshold is defined as the current at which the output voltage drops to 90% of the specified typical value. For example, the current limit for a 5.0 V
output voltage is defined as the current that causes the output voltage to drop to 90% of 5.0 V, or 4.5 V.
INPUT AND OUTPUT CAPACITOR, RECOMMENDED SPECIFICATIONS
Table 2.
Parameter
Minimum Input and Output Capacitance1
Capacitor ESR
Symbol
CMIN
RESR
Conditions
TA = −40°C to +125°C
TA = −40°C to +125°C
Min Typ Max Unit
0.7
µF
0.001
0.2
Ω
1 The minimum input and output capacitance should be greater than 0.7 μF over the full range of operating conditions. The full range of operating conditions in the
application must be considered during device selection to ensure that the minimum capacitance specification is met. X7R and X5R type capacitors are recommended;
Y5V and Z5U capacitors are not recommended for use with any LDO.
Rev. A | Page 4 of 28

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