DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

AT89S2051 View Datasheet(PDF) - Atmel Corporation

Part Name
Description
Manufacturer
AT89S2051 Datasheet PDF : 45 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
AT89S2051/S4051
Table 17-1. SCON – Serial Port Control Register
SCON Address = 98H
Reset Value = 0000 0000B
Bit Addressable
SM0/FE
SM1
SM2
REN
TB8
RB8
TI
RI
Bit
7
6
5
4
3
2
1
0
(SMOD = 0/1)(1)
Symbol
FE
SM0
SM1
Function
Framing error bit. This bit is set by the receiver when an invalid stop bit is detected. The FE bit is not cleared by valid
frames but should be cleared by software. The SMOD0 bit must be set to enable access to the FE bit. FE will be set
regardless of the state of SMOD.
Serial Port Mode Bit 0, (SMOD must = 0 to access bit SM0)
Serial Port Mode Bit 1
SM0
SM1
Mode
Description
Baud Rate(2)
0
0
0
shift register
fosc/12
0
1
1
8-bit UART
variable
1
0
2
9-bit UART
fosc/64 or fosc/32
1
1
3
9-bit UART
variable
SM2
REN
TB8
RB8
TI
RI
Notes:
Enables the Automatic Address Recognition feature in modes 2 or 3. If SM2 = 1 then Rl will not be set unless the received
9th data bit (RB8) is 1, indicating an address, and the received byte is a Given or Broadcast Address. In mode 1, if SM2 =
1 then Rl will not be activated unless a valid stop bit was received, and the received byte is a Given or Broadcast Address.
In Mode 0, SM2 should be 0.
Enables serial reception. Set by software to enable reception. Clear by software to disable reception.
The 9th data bit that will be transmitted in modes 2 and 3. Set or clear by software as desired.
In modes 2 and 3, the 9th data bit that was received. In mode 1, if SM2 = 0, RB8 is the stop bit that was
received. In mode 0, RB8 is not used.
Transmit interrupt flag. Set by hardware at the end of the 8th bit time in mode 0, or at the beginning of the
stop bit in the other modes, in any serial transmission. Must be cleared by software.
Receive interrupt flag. Set by hardware at the end of the 8th bit time in mode 0, or halfway through the stop
bit time in the other modes, in any serial reception (except see SM2). Must be cleared by software.
1. SMOD is located at PCON.7.
2. fosc = frequency.
17
3390C–MICRO–7/05

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]