S83C196KB View Datasheet(PDF) - Intel
Part Name
Description
Manufacturer
S83C196KB Datasheet PDF : 22 Pages
| |||
8XC196KB 8XC196KB16
10-BIT A D CHARACTERISTICS
State times are calculated as follows
At a clock speed of 6 MHz or less the clock prescal-
er should be disabled This is accomplished by set-
2
state time e
XTAL1
ting IOC2 4 e 1
The converter is ratiometric so the absolute accura-
At higher frequencies (greater than 6 MHz) the clock
prescaler should be enabled (IOC2 4 e 0) to allow
the comparator to settle
cy is directly dependent on the accuracy and stability
of VREF VREF must be close to VCC since it supplies
both the resistor ladder and the digital section of the
converter
The table below shows two different clock speeds
and their corresponding A D conversion and sample
times
See the MCS-96 A D Converter Quick Reference
for definition of A D terms
Example Sample and Conversion Times
A D Clock
Prescaler
x IOC2 4 e 0 ON
x IOC2 4 e 1 OFF
Clock Speed
(MHz)
16
6
Sample Time
(States)
15
8
Sample Time
at Clock
Speed
(ms)
1 875
2 667
Conversion
Time
(States)
156 5
89 5
Conversion
Time at
Clock Speed
(ms)
19 6
29 8
A D CONVERTER SPECIFICATIONS
Parameter
Typical(1)
Resolution
Absolute Error
Full Scale Error
Zero Offset Error
Non-Linearity Error
Differential Non-Linearity Error
Channel-to-Channel Matching
Repeatability
Temperature Coefficients
Offset
Full Scale
Differential Non-Linearity
Off Isolation
Feedthrough
VCC Power Supply Rejection
Input Series Resistance
DC Input Leakage
Sampling Capacitor
0 25 g0 50
0 25 g0 50
1 5 g2 5
g0 1
g0 25
0 009
0 009
0 009
b60
b60
3
Minimum
1024
10
0
0
lb1
0
b60
750
0
NOTES
An ‘‘LSB’’ as used here has a value of approximately 5 mV
1 Typical values are expected for most devices at 25 C
2 DC to 100 KHz
3 Multiplexer Break-Before-Make Guaranteed
4 Resistance from device pin through internal MUX to sample capacitor
Maximum
1024
10
g3
g3
a2
g1
1 2K
g3 0
Units
Levels
Bits
LSBs
LSBs
LSBs
LSBs
LSBs
LSBs
LSBs
LSB C
LSB C
LSB C
dB
dB
dB
X
mA
pF
Notes
23
2
2
4
17
Share Link: 