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Q67060-S7005-A2 View Datasheet(PDF) - Siemens AG

Part Name
Description
Manufacturer
Q67060-S7005-A2
Siemens
Siemens AG Siemens
Q67060-S7005-A2 Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Maximum Ratings at Tj = 25°C unless otherwise specified
Parameter
Symbol
Load current (Short-circuit current, see page 5)
Load dump protection2) VLoadDump = UA + Vs, UA = 13.5 V
RI3) = 2 , td = 200 ms; IN = low or high,
each channel loaded with RL = 4.7 ,
Operating temperature range
Storage temperature range
Power dissipation (DC)5
(all channels active)
Electrostatic discharge capability (ESD)
(Human Body Model)
Ta = 25°C:
Ta = 85°C:
Input voltage (DC)
Current through input pin (DC)
Current through status pin (DC)
see internal circuit diagram page 8
IL
VLoad dump4)
Tj
Tstg
Ptot
VESD
VIN
IIN
IST
Thermal resistance
junction - soldering point5),6)
junction - ambient5)
each channel: Rthjs
one channel active: Rthja
all channels active:
BTS720L1
Values Unit
self-limited A
60 V
-40 ...+150 °C
-55 ...+150
3.7 W
1.9
1.0 kV
-10 ... +16 V
±2.0 mA
±5.0
15 K/W
41
34
Electrical Characteristics
Parameter and Conditions, each of the four channels Symbol
at Tj = 25 °C, Vbb = 12 V unless otherwise specified
Values
Unit
min typ max
Load Switching Capabilities and Characteristics
On-state resistance (Vbb to OUT)
IL = 2 A
each channel, Tj = 25°C: RON
Tj = 150°C:
two parallel channels, Tj = 25°C:
four parallel channels, Tj = 25°C:
-- 85 100 m
170 200
43 50
22 25
2) Supply voltages higher than Vbb(AZ) require an external current limit for the GND and status pins, e.g. with a
150 resistor in the GND connection and a 15 kresistor in series with the status pin. A resistor for input
protection is integrated.
3) RI = internal resistance of the load dump test pulse generator
4) VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839
5) Device on 50mm*50mm*1.5mm epoxy PCB FR4 with 6cm2 (one layer, 70µm thick) copper area for Vbb
connection. PCB is vertical without blown air. See page 14
6) Soldering point: upper side of solder edge of device pin 15. See page 14
Semiconductor Group
Page 3
26.Feb.96

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