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DPL4519 View Datasheet(PDF) - Unspecified

Part Name
Description
Manufacturer
DPL4519 Datasheet PDF : 64 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
DPL 4519G
PRELIMINARY DATA SHEET
Contents
Page
Section
4
1.
5
1.1.
6
1.2.
7
2.
7
2.1.
8
2.2.
8
2.3.
8
2.4.
8
2.5.
8
2.5.1.
8
2.6.
8
2.6.1.
8
2.6.1.1.
9
2.6.1.2.
9
2.6.1.3.
9
2.6.1.4.
10
2.6.2.
11
2.6.3.
11
2.6.3.1.
11
2.6.3.2.
11
2.6.3.3.
11
2.6.3.4.
11
2.6.4.
11
2.7.
11
2.7.1.
12
2.7.2.
12
2.8.
12
2.8.1.
12
2.8.2.
12
2.8.3.
12
2.8.4.
13
2.9.
13
2.10.
14
3.
14
3.1.
14
3.1.1.
14
3.1.2.
15
3.1.3.
15
3.1.4.
16
3.1.5.
16
3.1.5.1.
16
3.1.5.2.
16
3.1.5.3.
16
3.1.5.4.
16
3.2.
Title
Introduction
Features of the DPL 4519G
Application Fields of the DPL 4519G
Functional Description
Architecture of the DPL 4519G Family
Preprocessing I2S Input Signals
Selection of Internal Processed Surround Signals
Source Selection and Output Channel Matrix
Audio Baseband Processing
Main and Aux Outputs
Surround Processing
Surround Processing Mode
Decoder Matrix
Surround Reproduction
Center Modes
Useful Combinations of Surround Processing Modes
Examples
Application Tips for using 3D-PANORAMA
Sweet Spot
Clipping
Loudspeaker Requirements
Cabinet Requirements
Input and Output Levels for Dolby Surround Pro Logic
SCART Signal Routing
SCART Out Select
Stand-by Mode
I2S Bus Interfaces
Synchronous I2S-Interface(s)
Asynchronous I2S-Interface
Multichannel I2S-Output
Asynchronous Multichannel I2S-Input
Digital Control I/O Pins
Clock PLL Oscillator and Crystal Specifications
Control Interface
I2C Bus Interface
Device and Subaddresses
Internal Hardware Error Handling
Description of CONTROL Register
Protocol Description
Proposals for General DPL 4519G I2C Telegrams
Symbols
Write Telegrams
Read Telegrams
Examples
Start-Up Sequence: Power-Up and I2C Controlling
2
Micronas

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