F25L004A View Datasheet(PDF) - [Elite Semiconductor Memory Technology Inc.
Part Name
Description
Manufacturer
F25L004A Datasheet PDF : 30 Pages
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ESMT
F25L004A
TABLE 8: CAPACITANCE (TA = 25°C, f=1 Mhz, other pins open)
Parameter
COUT1
CIN1
Output Pin Capacitance
Input Capacitance
Description
Test Condition
VOUT = 0V
VIN = 0V
Maximum
12 pF
6 pF
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 11: RELIABILITY CHARACTERISTICS
Symbol
Parameter
NEND1
Endurance
TDR1
Data Retention
ILTH1
Latch Up
Minimum Specification
100,000
10
100 + IDD
Units
Cycles
Years
mA
Test Method
JEDEC Standard A117
JEDEC Standard A103
JEDEC Standard 78
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 12 : AC OPERATING CHARACTERISTICS
Symbol
Parameter
Normal 33MHz Fast 50 MHz Fast 100 MHz
Min Max Min Max Min Max
Units
FCLK
TSCKH
TSCKL
TCES1
TCEH1
TCHS1
TCHH1
TCPH
TCHZ
TCLZ
TDS
TDH
THLS
THHS
THLH
THHH
THZ
TLZ
TOH
TV
Serial Clock Frequency
33
50
100
Serial Clock High Time
13
9
5
Serial Clock Low Time
13
9
5
CE Active Setup Time
5
5
5
CE Active Hold Time
5
5
5
CE Not Active Setup Time
5
5
5
CE Not Active Hold Time
5
5
5
CE High Time
100
100
100
CE High to High-Z Output
9
9
9
SCK Low to Low-Z Output
0
0
0
Data In Setup Time
3
3
3
Data In Hold Time
3
3
3
HOLD Low Setup Time
5
5
5
HOLD High Setup Time
5
5
5
HOLD Low Hold Time
5
5
5
HOLD High Hold Time
5
5
5
HOLD Low to High-Z Output
9
9
9
HOLD High to Low-Z Output
9
9
9
Output Hold from SCK Change 0
0
0
Output Valid from SCK
12
8
7
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1. Relative to SCK.
Elite Semiconductor Memory Technology Inc.
Publication Date: Jan. 2009
Revision: 1.6
21/30
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