HMT112R7AFP8C View Datasheet(PDF) - Hynix Semiconductor
Part Name
Description
Manufacturer
HMT112R7AFP8C Datasheet PDF : 41 Pages
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3. Functional Block Diagram
3.1 1GB, 128Mx72 Module(1Rank of x8)
DQS8
DQS
ZQ
DQS4
DQS
ZQ
DQS8
DQS
DQS4
DQS
DM8/DQS17
DQS17
TDQS
TDQS
D8
DM4/DQS13
DQS13
TDQS
TDQS
D4
CB[7:0]
DQ [7:0]
DQ[39:32]
DQ [7:0]
DQS3
DQS
ZQ
DQS5
DQS
ZQ
DQS3
DQS
DQS5
DQS
DM3/DQS12
DQS12
TDQS
TDQS
D3
DM5/DQS14
DQS14
TDQS
TDQS
D5
DQ[31:24]
DQ [7:0]
DQ[47:40]
DQ [7:0]
DQS2
DQS
ZQ
DQS6
DQS
ZQ
DQS2
DQS
DQS6
DQS
DM2/DQS11
DQS11
TDQS
TDQS
D2
DM6/DQS15
DQS15
TDQS
TDQS
D6
DQ[23:16]
DQ [7:0]
DQ[55:48]
DQ [7:0]
DQS1
DQS1
DM1/DQS10
DQS10
DQ[15:8]
DQS
DQS
TDQS
TDQS
DQ [7:0]
D1
DQS0
DQS0
DM0/DQS9
DQS9
DQ[7:0]
DQS
DQS
TDQS
TDQS
D0
DQ [7:0]
Vtt
ZQ
DQS7
DQS
DQS7
DQS
DM7/DQS16
DQS16
TDQS
TDQS
D7
DQ[63:56]
DQ [7:0]
ZQ
Vtt
ZQ
VDDSPD
VDD
VTT
VREFCA
VREFDQ
VSS
SPD
D0–D8
D0–D8
D0–D8
D0–D8
Note:
1.DQ-to-I/O wiring may be changed within byte.
2.ZQ resistors are 240Ω ± 1%.For all other resistor values refer to the
appropriate wiring diagram.
S0
RS0A → CS0: SDRAMs D[3:0], D8
S1
BA[N:0]
A[N:0]
RAS
CAS
WE
CKE0
ODT0
CK0
CK0
CK0
CK0
1:
2
R
E
G
I
S
T
E
R
/
P
120Ω
± 1%
L
L
120Ω
± 1%
RS0B → CS0: SDRAMs D[7:4]
RBA[N:0]A → BA[N:0]: SDRAMs D[3:0], D8
RBA[N:0]A → BA[N:0]: SDRAMs D[7:4]
RA[N:0]A → A[N:0]: SDRAMs D[3:0], D8
RA[N:0]A → A[N:0]: SDRAMs D[7:4]
RRASA → RAS: SDRAMs D[3:0], D8
RRASA → RAS: SDRAMs D[7:4]
RCASA → CAS: SDRAMs D[3:0], D8
RCASA → CAS: SDRAMs D[7:4]
RWEA → WE: SDRAMs D[3:0], D8
RWEA → WE: SDRAMs D[7:4]
RCKE0A → CKE0: SDRAMs D[3:0], D8
RCKE0B → CKE0: SDRAMs D[7:4]
RODT0A → ODT0: SDRAMs D[3:0], D8
RODT0B → ODT0: SDRAMs D[7:4]
PCK0A → CK: SDRAMs D[3:0], D8
PCK0B → CK: SDRAMs D[7:4]
PCK0A → CK: SDRAMs D[3:0], D8
PCK0B → CK: SDRAMs D[7:4]
VDDSPD
VDDSPD
SA0
SA0
EVENT
EVENT SPD with SA1
SA1
SCL
SCL Integrated SA2
SA2
SDA
SDA
TS
VSS
VSS
Plan to use SPD with Integrated TS of Class B and
might be changed on customer’s requests. For more
details of SPD and Thermal sensor, please contact
local Hynix sales representative
PAR_IN
OERR Err_Out
RESET RST
RST: SDRAMs D[8:0]
S[3:2], CKE1, ODT1, are NC (Unused register inputs ODT1 and CKE1 have a 330Ω resistor to ground
Rev. 0.4 / Jul. 2009
11
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