HYB39S64800AT View Datasheet(PDF) - Siemens AG

Part Name

Description

Manufacturer

HYB39S64800AT

64MBit Synchronous DRAM

Siemens AG 

Parameter

Refresh Cycle

Refresh Period

(4096 cycles)

Self Refresh Exit Time

Read Cycle

Data Out Hold Time

Data Out to Low Impedance Time

Data Out to High Impedance Time

DQM Data Out Disable Latency

Write Cycle

Data Input to Precharge

(write recovery)

DQM Write Mask Latency

HYB39S64400/800/160AT(L)

64MBit Synchronous DRAM

Symbol

Limit Values

Unit

-8

-8B

-10

min. max. min. max. min. max.

tREF

tSREX

– 64 – 64 – 64 ms

10 – 10 – 10 – ns

tOH

3 – 3 – 3 – ns 2

tLZ

0 – 0 – 0 – ns

tHZ

3 8 3 10 3 10 ns

tDQZ

– 2 – 2 – 2 CLK

tWR

2 – 2 – 2 – CLK

tDQW

0 – 0 – 0 – CLK

Semiconductor Group

17

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