HYB39S64800ATL View Datasheet(PDF) - Siemens AG
Part Name
Description
Manufacturer
HYB39S64800ATL Datasheet PDF : 53 Pages
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HYB39S64400/800/160AT(L)
64MBit Synchronous DRAM
3. Read Interrupted by a Read
(Burst Length = 4, CAS latency = 2, 3)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CLK
COMMAND READ A
READ B
NOP
NOP
NOP
NOP
NOP
NOP
NOP
CAS latency = 2
tCK2, DQ’s
CAS latency = 3
tCK3, DQ’s
DOUT A0
DOUT B0
DOUT B1
DOUT B2
DOUT B3
DOUT A0
DOUT B0
DOUT B1
DOUT B2
DOUT B3
4.1 Read to Write Interval
(Burst Length = 4, CAS latency = 3)
T0
T1
T2
T3
T4
T5
T6
T7
T8
CLK
DQM
COMMAND NOP
Minimum delay between the Read and Write Commands = 4+1 = 5 cycles
tDQZ
tDQW
READ A
NOP
NOP
NOP
NOP
WRITE B
NOP
NOP
DQ’s
: “H” or “L”
DOUT A0
Must be Hi-Z before
the Write Command
DIN B0
DIN B1
DIN B2
Semiconductor Group
23
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