ADN8830 Datasheet PDF - Analog Devices

ADN8830(2003) View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADN8830
(Rev.:2003)

Thermoelectric Cooler Controller

Analog Devices

ADN8830 Datasheet PDF : 24 Pages

First Prev 11 12 13 14 15 16 17 18 19 20 Next Last

ADN8830

Although the FETs that drive OUT A alternate between Q1 and

Q2 being on, they have an equivalent series resistance that is

equal to a weighted average of their rDS, ON values.

( ) REQIV = D × rDS, P1 + 1 – D × rDS, N1

(35)

The resistive power loss from the PWM transistors is then

PFET, PWM = REQIV × ITEC 2

(36)

There is also a power loss from the continuing charging and

discharging of the gate capacitances on Q1 and Q2. The power

dissipated due to gate charge loss (PGCL) is

PGCL

CISSVDD

fCLK

(37)

using the appropriate input capacitance (CISS) for the NMOS

and PMOS. Both transistors are switching, so PGCL should be

calculated for each one and will be added to find the total power

dissipated from the circuit.

The series resistance of the inductor, R2 from Figure 14, will

also exhibit a power dissipation equal to

PR2 = R2 × ITEC2

(38)

Core loss from the inductor arises as a result of nonidealities of

the inductor. Although this is difficult to calculate explicitly, it

can be estimated as 80% of PRLS at 1 MHz switching frequen-

cies and 50% of PRL at 100 kHz. Judging conservatively

PLOSS = 0.8 × PRL

(39)

Finally, the power dissipated by the ADN8830 is equal to the

current used by the device multiplied by the supply voltage.

Again, this exact equation is difficult to determine as we have

already taken into account some of the current while finding the

gate charge loss. A reasonable estimate is to use 40 mA as the

total current used by the ADN8830. The power dissipated from

the device itself is

PADN 8830 = VDD × 10 mA

(40)

There are certainly other minor mechanisms for power dissipa-

tion in the circuit. However, a rough estimate of the total power

dissipated can be found by summing the preceding power dissi-

pation equations. Efficiency is then found by comparing the

power dissipated with the required output power to the load.

Efficiency

PLOAD

PLOAD + PDISS,

TOT

(41)

where

PLOAD = ILOAD ×VLOAD

The measured efficiency of the system will likely be less than the

calculated efficiency. Measuring the efficiency of the application

circuit is fairly simple but must be done in an exact manner to

ensure the correct numbers are being measured. Using two high

current, low impedance ammeters and two voltmeters, the cir-

cuit should be set up as shown in Figure 15.

POWER SUPPLY

VDD

GND

ADN8830

TEC

LOAD

Figure 15. Measuring Efficiency of the ADN8830 Circuit

Table V. Recommended FETs for Linear Output Amplifier

Part Number

FDW2520C*

IRF7401

IRF7233

FDR6674A

FDR840P

Type

NMOS

PMOS

NMOS

PMOS

NMOS

PMOS

CGD (nF)

0.17

0.15

0.5

2.2

0.23

0.6

Ext. CGD (nF)

2.2

1.0

*Recommend transistors in typical application circuit Figure 1.

CSNUB (nF)

3.3

rDS, ON (m⍀)

9.5

IMAX (A)

6.0

4.5

8.7

9.5

11.5

Manufacturer

Fairchild

International Rectifier

Fairchild

Table VI. Recommended FETs for PWM Output Amplifier

Part Number

FDW2520C*

Si7904DN

Si7401DN

IRF7401

IRF7404

Type

NMOS

PMOS

NMOS

PMOS

NMOS

PMOS

CISS (nF)

1.33

1.0

3.5

1.6

1.5

*Recommend transistors in typical application circuit Figure 1.

rDS,ON (m⍀)

Continuous IMAX (A)

6.0

4.5

5.3

7.3

8.7

6.7

Manufacturer

Fairchild

Vishay Siliconix

International Rectifier

REV. C

–17–

Share Link: