LM75 View Datasheet(PDF) - ON Semiconductor

Part Name

Description

Manufacturer

LM75

2-Wire Serial Temperature Sensor and Monitor

ON Semiconductor 

LM75

programmed in the Fault Queue. Up to a six–cycle ”filter”

may be selected. See Register Set and Programmer’s Model.

Serial Port Operation

The Serial Clock input (SCL) and bidirectional data port

(SDA) form a 2–wire bidirectional serial port for

programming and interrogating the LM75. The following

conventions are used in this bus scheme:

LM75 Serial Bus Conventions

Term

Explanation

Transmitter The device sending data to the bus.

Receiver The device receiving data from the bus.

Master

The device which controls the bus: initiat-

ing transfers (START), generating the

clock, and terminating transfers (STOP).

Slave

The device addressed by the master.

Start

A unique condition signaling the beginning

of a transfer indicated by SDA falling

(High–Low) while SCL is high.

Stop

A unique condition signaling the end of a

transfer indicated by SDA rising (Low –

High) while SCL is high.

ACK

A Receiver acknowledges the receipt of

each byte with this unique condition. The

Receiver drives SDA low during SCL high

of the ACK clock–pulse. The Master pro-

vides the clock pulse for the ACK cycle.

NOT Busy When the bus is idle, both SDA & SCL will

remain high.

Data Valid

The state of SDA must remain stable dur-

ing the High period of SCL in order for a

data bit to be considered valid. SDA only

changes state while SCL is low during nor-

mal data transfers. (See Start and Stop

conditions)

All transfers take place under control of a host, usually a

CPU or microcontroller, acting as the Master, which

provides the clock signal for all transfers. The LM75 always

operates as a Slave. This serial protocol is illustrated in

Figure 2. All data transfers have two phases; and all bytes are

transferred MSB first. Accesses are initiated by a start

condition (START), followed by a device address byte and

one or more data bytes. The device address byte includes a

Read/Write selection bit. Each access must be terminated by

a Stop Condition (STOP). A convention called

Acknowledge (ACK) confirms receipt of each byte. Note

that SDA can change only during periods when SCL is LOW

(SDA changes while SCL is HIGH are reserved for Start and

Stop Conditions).

Start Condition (START)

The LM75 continuously monitors the SDA and SCL lines

for a start condition (a HIGH to LOW transition of SDA

while SCL is HIGH), and will not respond until this

condition is met. (See Timing Diagram)

Address Byte

Immediately following the Start Condition, the host must

next transmit the address byte to the LM75. The four most

significant bits of the Address Byte (A6, A5, A4, A3) are

fixed to 1001(B). The states of A2, A1 and A0 in the serial

bit stream must match the states of the A2, A1 and A0

address inputs for the LM75 to respond with an

Acknowledge (indicating the LM75 is on the bus and ready

to accept data). The eighth bit in the Address Byte is a

Read–Write Bit. This bit is a 1 for a read operation or 0 for

a write operation.

Acknowledge (ACK)

Acknowledge (ACK) provides a positive handshake

between the host and the LM75. The host releases SDA after

transmitting eight bits then generates a ninth clock cycle to

allow the LM75 to pull the SDA line LOW to acknowledge

that it successfully received the previous eight bits of data or

address.

Data Byte

After a successful ACK of the address byte, the host must

next transmit the data byte to be written or clock out the data

to be read. (See the appropriate timing diagrams.) ACK will

be generated after a successful write of a data byte into the

LM75.

Stop Condition (STOP)

Communications must be terminated by a stop condition

(a LOW to HIGH transition of SDA while SCL is HIGH).

The Stop Condition must be communicated by the

transmitter to the LM75. (See Timing Diagram)

Power Supply

To minimize temperature measurement error, the

LM75DM–33 is factory calibrated at a supply voltage of

3.3V ±5% and the LM75DM–50 is factory calibrated at a

supply voltage of 5V ±5%. Either device is fully operational

over the power supply voltage range of 2.7V to 5.5V, but

with a lower measurement accuracy. The typical value of

this power supply–related error is ±2°C.

http://onsemi.com

5

Share Link: