LT1166CN8 View Datasheet(PDF) - Linear Technology
Part Name
Description
Manufacturer
LT1166CN8 Datasheet PDF : 16 Pages
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LT1166
APPLICATIONS INFORMATION
how tapping the sense resistors gives twice the limit
current or one half the limit current.
Foldback current limit can be added to the normal or
“square” current limit by including two resistors (30k
typical) from the power supplies to the ILIM pins as shown
in Figure 5. With square current limit the maximum output
current is independent of the voltage across the power
V+
1
VTOP SENSE+ 8
ILIM+ 7
RIN 2
3
VIN
VIN LT1166 VOUT
ILIM– 6
SENSE– 5
VBOTTOM
4
0.5Ω
0.5Ω
1Ω
1Ω
(2)(ILIM)
VOUT
(1/2)(ILIM)
devices. Foldback limit simply makes the output current
dependent on output voltage. This scheme puts dissipa-
tion limits on the output devices. The larger the voltage
across the power device, the lower the available output
current. This is represented in Figure 6, Output Voltage vs
Output Current for the circuit of Figure 5.
200
160
SQUARE ILIM+
120
80
40
FOLDBACK ILIM+
0
–40
FOLDBACK ILIM–
–80
–120
–160
SQUARE ILIM–
–200
–10 –8 –6 –4 –2 0 2 4 6
OUTPUT VOLTAGE (V)
8 10
LT1166 • F06
Figure 6. Output Current vs Output Voltage
V – 1166 • F04
Figure 4. Tapping Current Limit Resistors
330pF
20mA
30k
100Ω
1
VTOP
SENSE+
8
15V
IRFR024
ILIM+ 7
5.1k 2 VIN LT1166 VOUT 3
ILIM– 6
1k
1µF
10Ω
mA
VOUT
1µF
1k
10Ω
SENSE– 5
VBOTTOM
4
100Ω
IRFR9024
330pF
20mA
30k
–15V
1166 • F05
Figure 5. Unity Gain Buffer Amp with Foldback Current Limit
Driving the Shunt Regulator
It is possible to current drive the shunt regulator directly
without driving the input transconductance stage. This
has the advantage of higher speed and eliminates the need
to compensate the gm stage. With Pin 2 floating, the
LT1166 can be placed inside a feedback loop and
driven through the biasing current sources. The input
transconductance stage remains biased but has no effect
on circuit operation. The RL in Figure 7 is used to modu-
late the op amp supply current with input signal. This op
amp functions as a V-to-I with the supply leads acting as
current source outputs. The load resistor and the positive
input of the op amp are connected to the output of the
LT1166 for feedback to set AV = 1V/V. The capacitor CF
eliminates output VOS due to mismatch between ITOP and
IBOTTOM, and it also forms a pole at DC and a zero at
1/RFCF. The zero frequency is selected to give a –1V/V
gain in the op amp before the phase of the MOSFETs
degenerate the stability of the loop.
7
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