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LTC4263CDE-TRPBF View Datasheet(PDF) - Linear Technology

Part Name
Description
Manufacturer
LTC4263CDE-TRPBF
Linear
Linear Technology Linear
LTC4263CDE-TRPBF Datasheet PDF : 28 Pages
First Prev 21 22 23 24 25 26 27 28
LTC2205-14
APPLICATIONS INFORMATION
Data Format
The LTC2205-14 parallel digital output can be selected
for offset binary or 2’s complement format. The format
is selected with the MODE pin. This pin has a four level
logic input, centered at 0, 1/3VDD, 2/3VDD and VDD. An
external resistor divider can be user to set the 1/3VDD
and 2/3VDD logic levels. Table 1 shows the logic states
for the MODE pin.
Table 1. MODE Pin Function
MODE
0(GND)
1/3VDD
2/3VDD
VDD
OUTPUT FORMAT
Offset Binary
Offset Binary
2’s Complement
2’s Complement
CLOCK DUTY CYCLE
STABILIZER
Off
On
On
Off
Overflow Bit
An overflow output bit (OF) indicates when the converter
is over-ranged or under-ranged. A logic high on the OF
pin indicates an overflow or underflow.
Output Clock
The ADC has a delayed version of the encode input available
as a digital output. Both a noninverted version, CLKOUT+
and an inverted version CLKOUTare provided. The
CLKOUT+/CLKOUTcan be used to synchronize the
converter data to the digital system. This is necessary
when using a sinusoidal encode. Data can be latched on
the rising edge of CLKOUT+ or the falling edge of CLKOUT.
CLKOUT+ falls and CLKOUTrises as the data outputs
are updated.
Digital Output Randomizer
Interference from the ADC digital outputs is sometimes
unavoidable. Interference from the digital outputs may be
from capacitive or inductive coupling or coupling through
the ground plane. Even a tiny coupling factor can result in
discernible unwanted tones in the ADC output spectrum.
By randomizing the digital output before it is transmitted
off chip, these unwanted tones can be randomized, trading
a slight increase in the noise floor for a large reduction in
unwanted tone amplitude.
LTC2205-14
CLKOUT
CLKOUT
OF
OF
D13
D13/D0
D12
D12/D0
D2
D2/D0
D1
D1/D0
RAND = HIGH,
SCRAMBLE
ENABLED
RAND
D0
D0
220514 F12
Figure 12. Functional Equivalent of Digital Output Randomizer
The digital output is “Randomized” by applying an
exclusive-OR logic operation between the LSB and all
other data output bits. To decode, the reverse operation
is applied; that is, an exclusive-OR operation is applied
between the LSB and all other bits. The LSB, OF and
CLKOUT output are not affected. The output Randomizer
function is active when the RAND pin is high.
Output Driver Power
Separate output power and ground pins allow the output
drivers to be isolated from the analog circuitry. The power
supply for the digital output buffers, OVDD, should be tied
to the same power supply as for the logic being driven.
OVDD can be powered with any logic voltage up to the VDD
of the ADC. OGND can be powered with any voltage from
ground up to 1V and must be less than OVDD. The logic
outputs will swing between OGND and OVDD.
220514fb
21

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