DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

M34282MX-XXXGP View Datasheet(PDF) - Renesas Electronics

Part Name
Description
Manufacturer
M34282MX-XXXGP
Renesas
Renesas Electronics Renesas
M34282MX-XXXGP Datasheet PDF : 69 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
4282 Group
PERFORMANCE OVERVIEW
Parameter
Function
Number of basic instructions
68
Minimum instruction execution time 8.0 µs (f(XIN) = 4.0 MHz, system clock = f(XIN)/8, VDD = 3 V)
Memory sizes ROM M34282M2/E2 2048 words 9 bits
M34282M1 1024 words 9 bits
RAM M34282M2/E2 64 words 4 bits
M34282M1 48 words 4 bits
Input/Output D0–D3 Output
Four independent output ports
ports
D4–D7 I/O
Four independent I/O ports with the pull-down function
E0–E2 Input
3-bit input port with the pull-down function
E0, E1 Output
2-bit output port (E0, E1)
G0–G3 I/O
4-bit I/O port with the pull-down function
CARR Output
1-bit output port; CMOS output
Timer
Timer 1
8-bit timer with a reload register
Timer 2
8-bit timer with two reload registers
Subroutine nesting
4 levels (However, only 3 levels can be used when the TABP p instruction is executed)
Device structure
CMOS silicon gate
Package
20-pin plastic molded SSOP (20P2E/F-A)
Operating temperature range
–20 °C to 85 °C
Supply voltage
1.8 V to 3.6 V
Power
Active mode
400 µA
dissipation
(f(XIN) = 4.0 MHz, system clock = f(XIN)/8, VDD = 3 V)
(typical value) RAM back-up mode 0.1 µA (at room temperature, VDD = 3 V)
PIN DESCRIPTION
Pin
Name
Input/Output
Function
VDD
Power supply
Connected to a plus power supply.
VSS
Ground
Connected to a 0 V power supply.
XIN
System clock input
Input I/O pins of the system clock generating circuit. Connect a ceramic resonator
XOUT
System clock output
between pins XIN and XOUT. The feedback resistor is built-in between pins XIN
Output
and XOUT.
D0–D3
Output port D
Output Each pin of port D has an independent 1-bit wide output function. The output
structure is P-channel open-drain.
D4–D7
I/O port D
I/O 1-bit I/O port. For input use, set the latch of the specified bit to “0.” When the built-
in pull-down transistor is turned on, the key-on wakeup function using “H” level
sense and the pull-down transistor become valid. The output structure is P-channel
open-drain.
E0–E2
I/O port E
Output 2-bit (E0, E1) output port. The output structure is P-channel open-drain.
Input 3-bit input port. For input use (E0, E1), set the latch of the specified bit to “0.”
When the built-in pull-down transistor is turned on, the key-on wakeup function
using “H” level sense and the pull-down transistor become valid. Port E2 has an
input-only port and has a key-on wakeup function using “H” level sense and pull-
down transistor.
G0–G3
I/O port G
I/O 4-bit I/O port. For input use, set the latch of the specified bit to “0.” The output structure
is P-channel open-drain. When the built-in pull-down transistor is turned on, the key-
on wakeup function using “H” level sense and pull-down transistor become valid.
CARR
Carrier wave output Output Carrier wave output pin for remote control. The output structure is CMOS circuit.
for remote control
Rev.1.33 Mar 18, 2004 page 3 of 67

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]