MITSUBISHI MICROCOMPUTERS
M37210M3-XXXSP/FP, M37210M4-XXXSP, M37211M2-XXXSP
M37210E4-XXXSP/FP, M37210E4SP/FP
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER for VOLTAGE SYNTHESIZER
with ON-SCREEN DISPLAY CONTROLLER
FUNCTIONAL DESCRIPTION
Central Processing Unit (CPU)
The M37210M3-XXXSP/FP uses the standard 740 family instruction
set. Refer to the table of 740 family addressing modes and machine
instructions or the SERIES 740 〈Software〉 User’s Manual for details
on the instruction set.
Machine-resident 740 family instructions are as follows :
The FST and SLW instruction cannot be used.
The MUL, DIV, WIT, and STP instruction can be used.
CPU Mode Register
The CPU mode register is allocated at address 00FB16. The CPU
mode register contains the stack page selection bit.
7
11111
0
00
CPU mode register
(CPUM : address 00FB16)
Fix these bits to “002”
Stack page selection bit (Note)
0 : Zero page
1 : 1 page
Fix these bits to “11112”
Note : Please beware of this bit when programming because it is set to “1” after the reset release.
Especially the internal RAM of the M37211M2-XXXSP is in the zero page, so be sure to set this bit to “0”.
Fig. 1 Structure of CPU mode register
6