M66290AGP View Datasheet(PDF) - Renesas Electronics
Part Name
Description
Manufacturer
M66290AGP Datasheet PDF : 54 Pages
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MITSUBISHI <DIGITAL ASSP>
M66290AGP/FP
USB DEVICE CONTROLLER
Functional and register descriptions
We explain about Function and register constitution of And when use this f unction, dev ice state shif ts to Address
M66290A div iding into f our items as f ollows.
state af ter outputs remote wakeup signal, so it is needed
(1) Sy stem control
to set up again the dev ice state to Conf igured state.
(2) Interrupts
Change of set up of dev ice state can be done in S/W
(3) Control transf er/enumeration
control mode.
(4) Endpoints and FIFO control
Remote wakeup signal is a signal to set USB bus to idle
(1) System control
CLOCK
state af ter output K-state of 10ms length.
If this remote wakeup f unction is set up immediately af ter
detected suspend, USB bus idle state is kept f or 2ms and
Clock of 48MHz is needed f or internal operations
then shif ts to K state output. (Because USB bus idle state
of M66290A.
must be kept f or 5ms minimum until transmit of remote
Built in PLL enables to input external clock of 6/12/
wakeup signal, on the other hand af ter detect suspend,
24/48MHz. Selection of it is realized by the XTAL
USB idle state is continued f or 3ms)
of "USB Operation Enable Register".
When use external clock of 48MHz, PLL is not
Sequence toggle bit clear f unction
needed, so set to PLL operation disable.
Built in oscillation circuit enables to supply clock
by self oscillation.
To set the "USB Operation Enable Register", it can
be set the dev ice to standby state. Oscillation is
halted (clock input halted) by XCKE, PLL operation
In each endpoint of EP0 to EP5, data PID can be reset
independently and also can appoint PID of DATA0.
By this f unction, management of sequence toggle bit
in transf er af ter reset PID, is done by H/W automatically .
Error inf ormation in isochronous transf er
is halted by PLLC, and clock supply to USB block
is halted by SCKE.
To prev ent unstable behav ior by unstable clock,
clock supply to USB block must be obey ed the
process, that is, enables clock input by XCKE, wait
until oscillation stabilized, start PLL by PLLC, wait
until oscillation stabilized (less than 1ms), and start
clock supply to USB block by SCKE.
In isochronous transf er there is not retry f unction of
transmit/receiv e, because the handshake f rom receiv er
to transmitter is not returned not to disturb the time
equiv alent data transf er.
M66290A has enough inf ormation f unction which enables
f irmware to manage incorrect transf er in case of transf er
error occurred in isochronous transf er.
Inf ormation which M66290A can inf orm is, ov er run
RESET
error, under run error, receiv ed data error (CRC error,
S/W reset by the register set (USBE), dif f erent f rom bit stuf f ing error), and f rame number.
the hardware reset, keeps the v alue of register of
Sof tware control mode
USB operation enable register, FIFO relational
register, control transf er relational register,endpoint
In sof tware control mode, it is av ailable to set up (write)
f rom CPU as f ollows, USB_Address register (USB_Addr),
setting register, and so on.
And in USB reset (when more than 2.5us of SE0 state
is continued on D+, D- terminal), the v alue of register
is kept except f or "Interrupt Status Register 0" and
"USB_Address Register"
As to details of reset state, see each item of register.
D+ pull-up resistor control f unction
dev ice state register (DVSQ), control transf er stage
register (CTSQ).
Normally , use this mode with OFF.
(1) In case of crystal oscillation
C1
Xin
XTAL
Rf M66290A
To set the register, external TrON output is controlled
and can control the ON/OFF of pull-up resistor
(1.5kohm) on USB D+ line.
Remote wakeup f unction
C2 Rd
Xout
Place the parts as near the terminal as possible
(2) In case of external clock input
When dev ice is in suspended state, outputs remote
wakeup signal and can cancel suspended state to receiv e
clock input
Xin
resume f rom USB.
M66290A
Remote wakeup f unction is only ef f ectiv e in Suspended
state in which dev ice state shif ts f rom Conf igured state,
open
Xout
so don't use to other dev ice state.
Figure 1. Xin and Xout connections
6
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