M66290AGP View Datasheet(PDF) - Renesas Electronics
Part Name
Description
Manufacturer
M66290AGP Datasheet PDF : 54 Pages
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MITSUBISHI <DIGITAL ASSP>
M66290AGP/FP
USB DEVICE CONTROLLER
(1-1) USB Operation Enable Register (Address : 00h)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
XCKE PLLC XTAL[1:0] SCKE USBPC Tr_on[1:0]
SCTR USBE
Bit
Bit
Name
Name
Function
15
XCKE Oscillator enable 0 : Oscillator disable (clock input disable)
1 : Oscillator enable (clock input enable)
14 PLLC
PLL control
0 : PLL disable
1 : PLL enable
When use external clock of 48MHz, set to PLL disable.
13, 12 XTAL[1:0] Crystal select
00 : 1/1 division (external 48MHz input)
10 : 1/2 division (external 24MHz input)
01 : 1/4 division (external 12MHz input)
11 : 1/8 division (external 6MHz input)
11 SCKE
Internal clock
enable
0 : Internal clock (sck) disable
1 : Internal clock (sck) enable
0 : USB transceiver disable
10 USBPC USB transceiver 1 : USB transceiver enable
power control In suspend state, resume signal can be received even if USB
transceiver disabled.
Reset
W/R
H/W S/W USB
W/R 0 - -
W/R 0 - -
W/R 00 - -
W/R 0 - -
W/R 0 - -
Tr_on
9, 8
[1:0]
Tr_on output
control
X0 : TrON port ="Hi-Z"
01 : TrON port ="L"
11 : TrON port ="H"
This fields selects TrON output state, and it is effective when
external Vbus input is "H" level (5V). If external Vbus input is "L",
these bits can be set but TrON output does not operate.
W/R 00 - -
7 to 2 Reserved
Write/Read "0"
1
SCTR
Software control 0 : Normal Operation
mode
1 : Software Control Mode Operation
0 USBE
USB module
enable
0 : USB module disable (S/W Reset)
1 : USB module enable
W/R 0 - -
W/R 0 - -
(1-2) Remote Wake-up Register (Address : 02h)
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
WKUP
Bit
Bit
Name
15 to 1 Reserved
Name
Write/Read "0"
Function
Reset
W/R
H/W S/W USB
When CPU write "1" to WKUP for remote wake-up, M66290A outputs
K-State for 10ms, and return to Bus Idle-State.
(Remote wake-up signal)
0 WKUP Remote wake-up
This bit returns to "0" automatically after suspend is canceled.
If "1" is written into this bit after detected suspend, bus idle state is kept
for 2ms and after then shifts to K state output.
W/R 0 0 -
7
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