MAX4584 View Datasheet(PDF) - Maxim Integrated
Part Name
Description
Manufacturer
MAX4584 Datasheet PDF : 12 Pages
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Serially Controlled
Audio/Video Switches
CS
SCLK
DIN
20%
tCSS
20%
tDH
tDS
D7
tCL
20%
tCH
20% 20%
D6
20%
tCSW
tCSH
70%
tCSO
70%
70%
20%
70%
D1
D0
Figure 3. 3-Wire Serial-Interface Timing Diagram
SWITCHES UPDATED
CS
SCLK
DATA CLOCKED IN
DIN
D7 D6 D5 D4 D3 D2 D1 D0
MSB
LSB
INPUT DATA BITS
Figure 4. A Complete 3-Wire Serial Transmission
3-Wire Serial Interface
The MAX4585 3-wire serial interface is SPI/
QSPI/MICROWIRE compatible. An active-low chip-
select (CS) input enables the device to receive data for
the serial input (DIN). Data is clocked in on the rising
edge of the serial-clock (SCLK) signal. A total of 8 bits
are needed in each write cycle. The first bit clocked
into the MAX4585 is the command byte’s MSB; the last
bit clocked in is the data byte’s LSB. The first 5 bits of
the command byte are “don’t care.” While shifting data,
the device remains in its original configuration. After all
8 bits are clocked into the input shift register, a rising
edge on CS latches the data into the MAX4585’s inter-
nal registers, initiating the device’s change of state.
Figures 3 and 4 detail the 3-wire protocol, and Table 1
details the command byte format.
Addressable Serial Interface
To program several MAX4585s individually using a sin-
gle µP, connect DIN of each MAX4585 together and
control CS on each MAX4585 separately. To select a
particular device, drive the corresponding CS low,
clock in the 8-bit command, then drive CS high to exe-
cute the command. Typically, only one MAX4585 is
addressed at a time.
Power-Up State
The MAX4584/MAX4585 feature a preset power-up
state. See Table 1 to determine the power-up state of
these devices.
___________________Chip Information
TRANSISTOR COUNT: 2259
10 ______________________________________________________________________________________
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