MC56F8323PB View Datasheet(PDF) - Motorola => Freescale
Part Name
Description
Manufacturer
MC56F8323PB Datasheet PDF : 124 Pages
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56F8323 Data Sheet Table of Contents
Part 1: Overview . . . . . . . . . . . . . . . . . . . . 3
1.1. 56F8323 Features. . . . . . . . . . . . . . . . . . . 3
1.2. 56F8323 Description . . . . . . . . . . . . . . . . 4
1.3. Award-Winning Development
Environment . . . . . . . . . . . . . . . 5
1.4. Architecture Block Diagram . . . . . . . . . . 5
1.5. Product Documentation . . . . . . . . . . . . . 8
1.6. Data Sheet Conventions. . . . . . . . . . . . . . 9
Part 2: Signal/Connection Descriptions . 10
2.1. Introduction . . . . . . . . . . . . . . . . . . . . . . 10
2.2. 56F8323 Signal Pins . . . . . . . . . . . . . . . 12
Part 3: On-Chip Clock Synthesis (OCCS) 22
3.1. Introduction . . . . . . . . . . . . . . . . . . . . . . 22
3.2. External Clock Operation . . . . . . . . . . . 22
3.3. Use of On-Chip Relaxation Oscillator . 23
3.4. Internal Clock Operation . . . . . . . . . . . 24
3.5. Registers . . . . . . . . . . . . . . . . . . . . . . . . 24
Part 4: Memory Map . . . . . . . . . . . . . . . . 25
4.1. Introduction . . . . . . . . . . . . . . . . . . . . . . 25
4.2. Program Map . . . . . . . . . . . . . . . . . . . . 25
4.3. Interrupt Vector Table . . . . . . . . . . . . . 26
4.4. Data Map . . . . . . . . . . . . . . . . . . . . . . . . 28
4.5. Flash Memory Map . . . . . . . . . . . . . . . . 28
4.6. EOnCE Memory Map . . . . . . . . . . . . . . 30
4.7. Peripheral Memory Mapped Registers . 31
Part 5: Interrupt Controller (ITCN) . . . 45
5.1. Introduction . . . . . . . . . . . . . . . . . . . . . . 45
5.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . 45
5.3. Functional Description. . . . . . . . . . . . . . 45
5.4. Block Diagram . . . . . . . . . . . . . . . . . . . 47
5.5. Operating Modes . . . . . . . . . . . . . . . . . . 47
5.6. Register Descriptions . . . . . . . . . . . . . . 48
5.7. Resets . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Part 6: SIM . . . . . . . . . . . . . . . . . . . . . . . . 69
6.1. Introduction . . . . . . . . . . . . . . . . . . . . . . 69
6.2. Features . . . . . . . . . . . . . . . . . . . . . . . . . 69
6.3. Operating Modes . . . . . . . . . . . . . . . . . . 69
6.4. Operating Mode Register . . . . . . . . . . . 70
6.5. Register Descriptions . . . . . . . . . . . . . . 70
6.6. Clock Generation Overview . . . . . . . . . 81
6.7. Power-Down Modes . . . . . . . . . . . . . . . 81
6.8. Stop and Wait Mode Disable Function . 82
6.9. Resets 82
Part 7: Security Features . . . . . . . . . . . . . 83
7.1. Operation with Security Enabled . . . . . 83
7.2. Flash Access Blocking Mechanisms . . 83
Part 8: GPIO . . . . . . . . . . . . . . . . . . . . . . . 86
8.1. Introduction . . . . . . . . . . . . . . . . . . . . . 86
8.2. Configuration . . . . . . . . . . . . . . . . . . . . 86
8.3. Memory Maps. . . . . . . . . . . . . . . . . . . . 88
Part 9: JTAG . . . . . . . . . . . . . . . . . . . . . . 88
9.1. 56F8323 Information . . . . . . . . . . . . . . . 88
Part 10: Specifications . . . . . . . . . . . . . . . 89
10.1. General Characteristics. . . . . . . . . . . . 89
10.2. DC Electrical Characteristics . . . . . . . . 93
10.3. AC Electrical Characteristics . . . . . . . . 96
10.4. Flash Memory Characteristics . . . . . . . 97
10.5. External Clock Operation Timing . . . . 98
10.6. Phase Locked Loop Timing . . . . . . . . 98
10.7. Oscillator Parameters . . . . . . . . . . . . . . 99
10.8. Reset, Stop, Wait, Mode Select,
and Interrupt Timing . . . . . . 100
10.9. Serial Peripheral Interface (SPI) Timing 103
10.10. Quad Timer Timing . . . . . . . . . . . . 106
10.11. Quadrature Decoder Timing . . . . . . 106
10.12. Serial Communication Interface (SCI)
Timing . . . . . . . . . . . . . . . . . . 107
10.13. Controller Area Network (CAN)
Timing . . . . . . . . . . . . . . . . . 108
10.14. JTAG Timing . . . . . . . . . . . . . . . . . . 108
10.15. Analog-to-Digital Converter (ADC)
Parameters . . . . . . . . . . . . . . 109
10.16. Equivalent Circuit for ADC Inputs . 111
10.17. Power Consumption . . . . . . . . . . . . 111
Part 11: Packaging . . . . . . . . . . . . . . . . . 113
11.1. Package and Pin-Out Information
56F8323 . . . . . . . . . . . . . . . . 113
Part 12: Design Considerations . . . . . . . 116
12.1. Thermal Design Considerations . . . . 116
12.2. Electrical Design Considerations . . . 117
12.3. Power Distribution and I/O Ring
Implementation . . . . . . . . . . 118
Part 13: Ordering Information . . . . . . . 119
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56F8323 Technical Data
MOTOROLA
Preliminary
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