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MC56F8323PB View Datasheet(PDF) - Motorola => Freescale

Part Name
Description
Manufacturer
MC56F8323PB
Motorola
Motorola => Freescale Motorola
MC56F8323PB Datasheet PDF : 124 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
5
JTAG / EOnCE
CHIP
TAP
Controller
pdb_m[15:0]
pab[20:0]
cdbw[31:0]
56800E
Boot
Flash
Program
Flash
Program
RAM
TAP
Linking
Module
xab1[23:0]
xab2[23:0]
Data RAM
External JTAG
Port
cdbr_m[31:0]
xdb2_m[15:0]
Data Flash
IP Bus
Bridge
To Flash
Control Logic
Note:
Note:
6
IP Bus
Figure 1-1 System Bus Interfaces
Flash
Interface
Unit(s)
Flash memories are encapsulated within the Flash Interface Unit (FIU). Flash control is
accomplished by the I/O to the FIU over the peripheral bus, while reads and writes are
completed between the core and the Flash memories.
The primary data RAM port is 32 bits wide. Other data ports are16 bits.
56F8323 Technical Data
Preliminary
MOTOROLA

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