MX29F8100 View Datasheet(PDF) - Macronix International

Part Name

Description

Manufacturer

MX29F8100

8M-BIT [1M x 8/512K x 16] CMOS SINGLE VOLTAGE FLASH MEMORY

Macronix International 

LOW VCC WRITE INHIBIT

To avoid initiation of a write cycle during VCC power-up

and power-down, a write cycle is locked out for VCC less

than VLKO(= 3.2V , typically 3.5V). If VCC < VLKO, the

command register is disabled and all internal program/

erase circuits are disabled. Under this condition the

device will reset to the read mode. Subsequent writes will

be ignored until the VCC level is greater than VLKO. It is

the user's responsibility to ensure that the control pins are

logically correct to prevent unintentional write when VCC

is above VLKO.

WRITE PULSE "GLITCH" PROTECTION

Noise pulses of less than 10ns (typical) on CE or WE will

not initiate a write cycle.

LOGICAL INHIBIT

Writing is inhibited by holding any one of OE = VIL,CE =

VIH or WE = VIH. To initiate a write cycle CE and WE

must be a logical zero while OE is a logical one.

INDEX

MX29F8100

P/N: PM0262

REV. 2.0, JAN. 22, 1999

15

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