SP320 View Datasheet(PDF) - Exar Corporation
Part Name
Description
Manufacturer
SP320 Datasheet PDF : 12 Pages
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+10V
a) C2+
GND
GND
b) C2–
Phase 4
-Vdd transfer- The fourth phase of the clock
connects the negative terminal of C2 to
ground and transfers the generated +10V
across C2 to C4, the Vdd storage capacitor.
Again, simultaneously with this, the positive
side of capacitor C1 is switched to +5V and
the negative side is connected to ground,
and the cycle begins again.
–10V
Since both V+ and V- are separately gener-
ated from Vcc in a no load condition, V+and
Figure 1. Charge Pump Waveforms
V- will be symmetrical. Older charge pump
approaches that generate V- from V+ will
capacitors, but uses a four-phase voltage
shifting technique to attain symmetrical ±10V
power supplies. The capacitors can be as low
show a decrease in the magnitude of V- com-
pared to V+ due to the inherent inefficiencies
in the design.
as 0.1µF with a 16 Volt rating. Polarized or
non-polarized capacitors can be used.
The clock rate for the charge pump typically
operates at 15kHz. The external capaci-
Figure 1(a) shows the waveform found on
the positive side of capacitor C2, and Figure
tors must be 0.1µF with a 16V breakdown
rating.
1(b) shows the negative side of capacitor C2.
There is a free-running oscillator that controls
the four phases of the voltage shifting. A
description of each phase follows.
Shutdown Mode
The SP320 can be put into a low power
shutdown mode by bringing both TS000 (pin
3) and ENV35 (pin 9) low. In shutdown mode,
Phase 1
-Vss charge storage- During this phase of
the clock cycle, the positive side of capactors
the SP320 will draw less than 2mA of supply
current. For normal operation, both pins
should be connected to +5V.
C1 and C2 are initially charged to +5V. C1+
is then switched to ground and the charge in
C1- is transferred to C2-. Since C2+ is con-
nected to +5V, the voltage potential across
capacitor C2 is now 10V.
External Power Supplies
For applications that do not require +5V only,
external supplies can be applied at the V+
and V- pins. The value of the external supply
voltages must be no greater than ±10V.
Phase 2
-Vss transfer- Phase two of the clock con-
nects the negative terminal of C2 to the Vss
storage capacitor and the positive terminal
of C2 to ground, and transfers the generated
-10V to C3. Simultaneously, the positive side
of capacitor C1 is switched to +5V and the
The current drain from the ±10V sup-
plies is used for the RS-232 drivers.
For the RS-232 driver the current re-
quirement will be 3.5mA per driver.
It is critical the external power supplies
provide a power supply sequence of : +10V,
+5V, and then -10V.
negative side is connected to ground.
Phase 3
-Vdd charge storage- The third phase of
the clock is identical to the first phase- the
transferred charge in C1 produces -5V in
the negative terminal of C1, which is applied
to the negative side of capacitor C2. Since
C2+ is at +5V, the voltage potential across
C2 is +10V.
Applications Information
The SP320 is a single chip device that can im-
plement a complete V.35 interface. Three (3)
V.35 drivers and three (3) V.35 receivers are
used for clock and data signals and four (4)
RS-232 (V.28) drivers and four (4) RS-232
(V.28) receivers can be used for the control
signals of the interface. The following ex-
amples show the SP320 configured in either
a DTE or DCE application.
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7017 • www.exar.com
SP320_100_092208
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