SP322 View Datasheet(PDF) - Signal Processing Technologies
Part Name
Description
Manufacturer
SP322 Datasheet PDF : 13 Pages
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Output
Under
Test CL
500Ω
S1
VCC
S2
Figure 16. Driver Timing Test Load #2 Circuit
TIN
A
B
CL1
CL2
VCC
A
ROUT
B
15pF
Receiver
Output
Test Point
1KΩ
S1
VCC
CRL
1KΩ
S2
Figure 17. Receiver Timing Test Load Circuit
Figure 18. Driver/Receiver Timing Test Circuit
SWITCHING WAVEFORMS...
+3V
DRIVER INPUT
0V
A
DRIVER
OUTPUT B
DIFFERENTIAL VO+
OUTPUT 0V
VA – VB VO–
tSKEW = |tDPLH - tDPHL|
f = 1MHz; tR ≤ 10ns; tF ≤ 10ns
1.5V
1.5V
tPLH
tPHL
VO 1/2VO
tDPHL
tDPLH
tF
Figure 19. Driver Propagation Delays
1/2VO
tR
+3V
ENABLE
0V
5V
A, B
VOL
VOH
A, B
0V
f = 1MHz; tR < 10ns; tF < 10ns
1.5V
tZL
2.3V Output normally LOW
2.3V Output normally HIGH
tZH
Figure 20. Driver Enable and Disable Times
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1.5V
tLZ
0.5V
0.5V
tHZ
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