MR82510 View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

MR82510

ASYNCHRONOUS SERIAL CONTROLLER

Intel 

M82510

TX FIFO

TRANSMIT CLOCKS

There are two modes of transmission clocking 1X

and 16X In the 1X mode the transmitted data is

synchronous to the transmit clock as supplied by the

SCLK pin In this mode stop-bit length is restricted to

one or two bits only In the 16X mode the data is not

required to be synchronous to the clock (Note The

Tx clock can be generated by the BRGs or from the

SCLK pin )

Figure 8 Tx FIFO

271072 –8

The Tx FIFO can hold up to four eleven-bit charac-

ters (nine-bits data parity and address flag) It has

separate read and write mechanisms The read and

write pointers are incremented after every operation

to allow data transfer to occur in a First In First Out

fashion The Tx FIFO will generate a maskable inter-

rupt when the level in the FIFO is below or equal to

the Threshold The threshold is user programmable

For example if the threshold equals two and the

number of characters in the Tx FIFO decreases from

three to two the FIFO will generate an interrupt The

threshold should be selected with regard to the sys-

tem’s interrupt service latency

NOTE

There is a one character transmission delay be-

tween FIFO empty and Transmitter Idle so a

threshold of zero may be selected without getting

an underrun condition Also if more than four char-

acters are written to the FIFO an overrun will occur

and the extra character will not be written to the Tx

FIFO This error will not be reported to the CPU

TX MACHINE

The Tx Machine reads characters from the Tx FIFO

serializes the bits and transmits them over the TXD

pin according to the timing signals provided for

transmission It will also generate parity transmit

break (upon CPU request) and manage the modem

handshaking signals (CTS and RTS) if configured

so The Tx machine can be enabled or disabled

through the Transmit Command register or CTS If

the transmitter is disabled in the middle of a charac-

ter transmission the transmission will continue until

the end of the character only then will it enter the

disable state

8

MODEM HANDSHAKING

The transmitter has three modes of handshaking

Manual Mode In this mode the CTS and RTS pins

are not used by the Tx Machine (transmission is

started regardless of the CTS state and RTS is not

forced low) The CPU may manage the handshake

itself by accessing the CTS and RTS signals

through the MODEM CONTROL and MODEM

STATUS registers

Semi-Automatic Mode In this mode the RTS pin

is activated whenever the transmitter is enabled

The CTS pin’s state controls transmission Trans-

mission is enabled only if CTS is active If CTS be-

comes inactive during transmission the Tx Machine

will complete transmission of the current character

and then go to the inactive state until CTS becomes

active again

Automatic Mode This mode is similar to the semi-

automatic mode except that RTS will be activated

as long as the transmitter is enabled and there are

more characters to transmit The CPU need only fill

the FIFO the handshake is done by the Tx Machine

When both the shift register and the FIFO are empty

RTS automatically goes inactive (Note The RTS pin

can be forced to the active state by the CPU regard-

less of the handshaking mode via the MODEM

CONTROL register )

Receive

The M82510 reception mechanism involves two ma-

jor blocks the Rx Machine and the Rx FIFO The Rx

Machine will assemble the incoming character and

its associated flags and then LOAD them on to the

Rx FIFO The top of the FIFO may be read by read-

ing the Receive Data register and the Receive Flags

Register The receive operation can be done in two

modes In the normal mode the characters are re-

ceived in the standard Asynchronous format and

only control characters are recognized In the ulan

mode the nine bit protocol of the MCS-51 family is

supported and the ulan Address characters rather

than Control Characters are recognized

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