AD9875-EB View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

AD9875-EB

Broadband Modem Mixed-Signal Front End

Analog Devices 

AD9875

The AVDD and DVDD power planes may be fed from the same

low noise voltage source; however, they should be decoupled

from each other to prevent the noise generated in the DVDD

portion of the MxFE from corrupting the AVDD supply. This

can be done by using ferrite beads between the voltage source

and DVDD, and between the source and AVDD. Both DVDD

and AVDD should have a low ESR, bulk decoupling capacitor

on the MxFE side of the ferrite as well as a low ESR, ESL

decoupling capacitors on each supply pin (i.e., the AD9875

requires five power supply decoupling caps, one each on Pins 5,

38, 47, 14, and 35). The decoupling caps should be placed as close

to the MxFE supply pins as possible. An example of the proper

decoupling is shown in the AD9875 evaluation board schematic.

Ground Planes

In general, if the component placing guidelines discussed earlier

can be implemented, it is best to have at least one continuous

ground plane for the entire board. All ground connections should be

made as short as possible. This will result in the lowest impedance

return paths, and the quietest ground connections.

If the components cannot be placed in a manner that will keep

the high-frequency ground currents from traversing under the

MxFE and analog components, it may be necessary to put

current steering channels into the ground plane to route the

high-frequency currents around these sensitive areas. These current

steering channels should be made only when and where necessary.

Signal Routing

The digital Rx and Tx signal paths should be kept as short as

possible. Also, the impedance of these traces should have a

controlled characteristic impedance of about 50 Ω. This will

prevent poor signal integrity and the high currents that can

occur during undershoot or overshoot caused by ringing. If the

signal traces cannot be kept shorter than about 1.5 inches, then

series-termination resistors (33 Ω to 47 Ω) should be placed

close to all signal sources. It is a good idea to series-terminate all

clock signals at their source, regardless of trace length.

The receive Rx± signals are the most sensitive signals on the

entire board. Careful routing of these signals is essential for good

receive path performance. The Rx± signals form a differential pair

and should be routed together as a pair. By keeping the traces

adjacent to each other, noise coupled onto the signals will

appear as common-mode and will be largely rejected by the

MxFE receive input. Keeping the driving point impedance of

the receive signal low and placing any low-pass filtering of the

signals close to the MxFE will further reduce the possibility of

noise corrupting these signals.

OUTLINE DIMENSIONS

Dimensions shown in inches and (mm).

48-Lead LQFP

(ST-48)

0.063 (1.60)

MAX

0.030 (0.75)

0.024 (0.60)

0.018 (0.45)

SEATING

PLANE

VIEW A

0.354 (9.00)

BSC SQ

0.039 (1.00)

36

25

REF

37

24

TOP VIEW

(PINS DOWN)

0.276

(7.00)

BSC

SQ

48

1

13

12

0.019 (0.50) 0.011 (0.27)

BSC 0.009 (0.22)

0.007 (0.17)

0.057 (1.45)

0.055 (1.40)

0.053 (1.35)

0.008 (0.20)

0.004 (0.09)

7؇

3.5؇

0.006 (0.15)

0؇

0.002 (0.05)

0.003 (0.08)

MAX

VIEW A

ROTATED 90؇ CCW

CONTROLLING DIMENSIONS ARE IN MILLIMETERS.

–24–

REV. 0

Share Link: