GDC21D601 View Datasheet(PDF) - Hynix Semiconductor
Part Name
Description
Manufacturer
GDC21D601 Datasheet PDF : 189 Pages
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GDC21D601
PIN NUMBER
118
120
121
123
124
125
127
128
129
131
132
133
135
136
137
138
139
142
141
144
145
147
148
149
151
PIN NAME
Mode 2
TACK
UCLKIN
UCLKOUT
TEST
NEXTREQ
PG0
NRESET
NEXTACK
PG1
NDREQ0
PG2
NDACK0
PG3
NDREQ1
PG4
NDACK1
PG5
NRAS0
PG6
NRAS1
PG7
NCAS0
PH0
NCAS1
PH1
NCAS2
PH2
NCAS3
PH3
XIN
XOUT
NDRAMOE
NDRAMWE
NWR0
NWR1
NWR2
NWR3
TYPE
I/O
I
O
I
I/O
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
O
O
O
O
O
O
O
DESCRIPTION
Boot Mode 2 (BigEndian Pin)
Big-endian Selection Pin, when this pin = 1(HIGH)
Note) When this pin is HIGH, External Data will be
transferred “Big-endian” format.
TACK Signal for TIC Test
UART Clock Oscillator Clock Input
UART block dedicated clock source supported.
(This clock source is used for UART and SMART Card Only)
UART Clock Oscillator Clock Output
Test Input Pin, Select 116~118 pin as Boot Mode or TIC Signal
External Master Request Bus Mastership, when PINMUX_PG[0] = 0
PIO Port G[0], when PINMUX_PG[0] = 1
System Power On Reset Input
To ensure proper initialization after power is stable,
assert NRESET pin for at least 20µs
Bus Granted Signal for External Master, when PINMUX_PG[1] = 0
PIO Port G[1] = 1, when PINMUX_PG[1] = 1
DMA Channel 0 Request, when PINMUX_PG[2] = 0
PIO Port G[2], when PINMUX_PG[2] = 1
DMA Channel 0 Acknowledge, when PINMUX_PG[3] = 0
PIO Port G[3], when PINMUX_PG[3] = 1
DMA Channel 1 Request, when PINMUX_PG[4] = 0
PIO Port G[4], when PINMUX_PG[4] = 1
DMA Channel 1 Acknowledge, when PINMUX_PG[5] = 0
PIO Port G[5], when PINMUX_PG[5] = 1
DRAM Bank #0 RAS Signal, when PINMUX_PG[6] = 0
PIO Port G[6], when PINMUX_PG[6] = 1
DRAM Bank #1 RAS Signal, when PINMUX_PG[7] = 0
PIO Port G[7], when PINMUX_PG[7] = 1
DRAM CAS0 Signal, when PINMUX_PH[0] = 0
PIO Port H[0], when PINMUX_PH[0] = 1
DRAM CAS1 Signal, when PINMUX_PH[1] = 0
PIO Port H[1], when PINMUX_PH[1] = 1
DRAM CAS2 Signal, when PINMUX_PH[2] = 0
PIO Port H[2], when PINMUX_PH[2] = 1
DRAM CAS3 Signal, when PINMUX_PH[3] = 0
PIO Port H[3], when PINMUX_PH[3] = 1
System Clock Input
(<80MHz)
External TTL oscillator input
System Clock Oscillator Output
DRAM Output Enable
DRAM Write Enable
Write Enable 0 for Static Memory(Byte)
Write Enable 1 for Static Memory(Byte)
Write Enable 2 for Static Memory(Byte)
Write Enable 3 for Static Memory(Byte)
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