V96SSC-33LPREVB1 View Datasheet(PDF) - QuickLogic Corporation

Part Name

Description

Manufacturer

V96SSC-33LPREVB1

HIGH-INTEGRATION SYSTEM CONTROLLER FOR i960 Sx/Jx AND PowerPC™ 401Gx PROCESSORS

QuickLogic Corporation 

V96SSC Rev. B1

HIGH-INTEGRATION SYSTEM CONTROLLER

FOR i960®Sx/Jx AND PowerPC™ 401Gx

PROCESSORS

• Direct interface to i960Sx/Jx and PPC401Gx

processors

• High-performance burst DRAM controller

• Two-channel fly-by DMA controller

• Serial communications unit

• Programmable chip-select/strobe generation

• Support for 8/16-bit boot PROMs

• Two 32-bit general purpose timers

• Pulse width modulation capability

• System watchdog and heartbeat timers

• 16 general purpose I/O bits

• Eight input ports and eight output ports

• Interrupt control unit

• Local bus speeds up to 33MHz

• Low cost 100-pin EIAJ PQFP package

• Fastest time to market for i960Sx and i960Jx

based designs

The V96SSC High-Integration System Controller

is a single-chip device that simplifies the design

of systems based on i960Sx, i960Jx or

PPC401Gx embedded microprocessors. The

V96SSC replaces many lower integration

components with a single, high-integration

device.

Nearly all i960 or PowerPC processor based

systems will require DRAM for code and data

storage. The V96SSC includes a high-

performance DRAM controller which is

programmable to accommodate a wide range of

DRAM speeds and architectures.

The eight chip-select/strobes further simplify

peripheral/memory connection. Each select has

programmable timing and a total of four wait-

state generators are provided.

Beyond simplifying memory and peripheral

control, the V96SSC also includes many of the

peripherals needed to build a high-performance

i960 or PPC401Gx based system: DMA

channels, synchronous/asynchronous serial port,

general purpose and system heartbeat timers, bit

I/O ports, and an interrupt controller.

In addition, the V96SSC includes special

features to enhance system integrity. The bus

watch timer prevents system hangs on access to

unpopulated memory. A watchdog timer is also

included to recover from software upsets.

Due to its small footprint, and glueless interface,

the V96SSC provides the best features of an

integrated processor without any performance

compromises!

i960Sx/Jx

PPC401Gx

CPU

IRQs

V96SSC

SYSTEM

CONTROLLER

ADDR DRAM

ARRAY

PROM

LOCAL BUS LOCALLOBCAULSLBOUCSAL BUS

V960PBC or V961PBC

PCI BRIDGE

CONTROLLER

PCI BUS

DMA REQUEST

CHIP SELECTS

AND STROBES

NETWORKING

DEVICE

Copyright © 1997, V3 Semiconductor Corp.

V96SSC Data Sheet Rev 2.3

1

V3 Semiconductor reserves the right to change the specifications of this product without notice.

V96SSC and V96xPBC are trademarks of V3 Semiconductor. All other trademarks are the property of their respective owners.

Share Link: