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INT201PF1 View Datasheet(PDF) - Power Integrations, Inc

Part Name
Description
Manufacturer
INT201PF1 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
INT201
HV+
C2
D1
VDD
8
76
5
INT201
1
23
4
8
76
5
R2
Q2
PHASE 1
PHASE 2
HS IN
LS IN
C1
INT200
1
23
4
R1
Q1
3-PHASE
BRUSHLESS
DC MOTOR
PHASE 3
HV-
Figure 4. Using the INT200 and INT201 in a 3-phase Configuration.
General Circuit Operation
PI-1467-042695
One phase of a three-phase brushless
DC motor drive circuit is shown in Figure
4 to illustrate an application of the
INT200/201. The LS IN signal directly
controls MOSFET Q1. The HS IN signal
causes the INT200 to command the
INT201 to turn MOSFET Q2 on or off as
required. The INT200 will ignore input
signals that would command both Q1
and Q2 to conduct simultaneously,
protecting against shorting the HV+ bus
to HV-.
The INT201 is latched on and off by the undervoltage lockout threshold.
edges of the appropriate low-side logic Undervoltage lockout-induced turn off
signal (HS IN for the INT200 and HS IN
can occur during conditions such as
for the INT202). The high-side driver power ramp up, motor start, or low speed
will latch off and stay off if the bootstrap operation.
capacitor discharges below the
CBOOTSTRAP vs. ON TIME
1000
100
Local bypassing for the low-side driver
is provided by C1. Bootstrap bias for the
high-side driver is provided by D1 and
C2. Slew rate and effects of parasitic
oscillations in the load waveforms are
controlled by resistors R1 and R2.
The inputs are designed to be compatible
with 5 V CMOS logic levels and should
not be connected to V . Normal CMOS
DD
power supply sequencing should be
observed. The order of signal application
should be V , logic signals, and then
DD
HV+.
10
QG = 100 nC
1
QG = 20 nC
0.1
0.01
0.01 0.1
1
10
100
High Side ON Time (ms)
Figure 5. High-side On Time versus Bootstrap Capacitor.
3 F
2/96

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