IDT70V05L(1996) View Datasheet(PDF) - Integrated Device Technology
Part Name
Description
Manufacturer
IDT70V05L Datasheet PDF : 17 Pages
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IDT70V05S/L
HIGH-SPEED 3.3V 8K x 8 DUAL-PORT STATIC RAM
COMMERCIAL TEMPERATURE RANGE
operation without the need for additional discrete logic.
This device provides two independent ports with separate
control, address, and I/O pins that permit independent,
asynchronous access for reads or writes to any location in
memory. An automatic power down feature controlled by CE
permits the on-chip circuitry of each port to enter a very low
standby power mode.
Fabricated using IDT’s CMOS high-performance technol-
ogy, these devices typically operate on only 350mW of power.
Low-power (L) versions offer battery backup data retention
capability with typical power consumption of 500µW from a 2V
battery.
The IDT70V05 is packaged in a ceramic 68-pin PGA, a 68-
pin PLCC, and a 64-pin thin plastic quad flatpack (TQFP).
PIN CONFIGURATIONS (1,2)
INDEX
I/O2L
I/O3L
I/O4L
I/O5L
GND
I/O6L
I/O7L
VCC
GND
I/O0R
I/O1R
I/O2R
VCC
I/O3R
I/O4R
I/O5R
I/O6R
9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61
10
60
11
59
12
58
13
57
14
IDT70V05
56
15
J68-1
55
16
F68-1
54
17
53
18
PLCC / FLATPACK
52
19
TOP VIEW(3)
51
20
50
21
49
22
48
23
47
24
46
25
45
26
44
27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
A5L
A4L
A3L
A2L
A1L
A0L
INTL
BUSYL
GND
M/S
BUSYR
INTR
A0R
A1R
A2R
A3R
A4R
2941 drw 02
INDEX
I/O2L
1
I/O3L
2
I/O4L
3
I/O5L
4
GND
5
I/O6L
6
I/O7L
7
VCC
8
GND
9
I/O0R
10
I/O1R
11
I/O2R
12
VCC
13
I/O3R
14
I/O4R
15
I/O5R
16
NOTES:
1. All Vcc pins must be connected to the power supply.
2. All GND pins must be connected to the ground supply.
3. This text does not indicate orientation of the actual part-marking.
6.35
IDT70V05
PN-64
TQFP
TOP VIEW(3)
48
A4L
47
A3L
46
A2L
45
A1L
44
A0L
43
INTL
42 BUSYL
41
GND
40
M/S
39 BUSYR
38
INTR
37
A0R
36
A1R
35
A2R
34
A3R
33
A4R
2941 drw 03
2
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