CXA1843Q View Datasheet(PDF) - Sony Semiconductor

Part Name

Description

Manufacturer

CXA1843Q

High-Speed Sample-and-Hold IC

Sony Semiconductor 

CXA1843Q

Connection and Setting for S/H + A/D Evaluation Board

1. Power supply voltage (CON6)

Item

Vcc

VEE

Min.

+4.75

–5.25

Typ.

+5.0

–5.0

Max.

+5.25

–4.75

Unit Typical current Unit

V

220

mA

V

–400

mA

2. Analog input (CON1, CON2) and offset adjustment (VR1)

[VIN Input] (CON1)

When the amplitude of an analog input signal supplied to the sample-and-hold is 1Vp-p and its input range is

within 1.0V to –0.9V, the board is able to amplify its amplitude by two times using the operation amplifier. The

S1 selector should be short-circuited at side A and opened at side B, and the analog input is added from

CON1. In this case, offset adjustment is required at the VR1, so that the dynamic range of the analog input

signal can be set to a value between 0V to –2V by monitoring the VIN pin.

[DIR IN. Input] (CON2)

When the input supplied to the sample-and-hold is a recurring signal (sine wave, etc.) without offset, it is

added using the AC coupled input from CON2 by connecting a 10kΩ resistor to side A and a 0.1µF capacitor

to side B of the S1 selector. In this case, offset adjustment is required at the VR1, so that the dynamic range

of the analog input signal can be set to a value between 0V to –2V by monitoring the VIN pin.

Item

VIN input (CON1)

DIR. IN input (CON2)

S1 setting

Min.

Typ.

Max. Amplitude Unit

A

B

–0.9

1.0

1.0

V short open

–2.0

0

2.0

2.0

V 10kΩ 0.1µF

(CON1 and CON2 are terminated to AGND at 50Ω on the board.)

3. Clock input (CON4)

TTL compatible

Use in the 30 to 70% CLK duty range

(CON4 is terminated to DGND at 50Ω on the board.)

4. Digital output (CON5)

TTL compatible

C-MOS (ACT series) output

– 14 –

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