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DS3508E View Datasheet(PDF) - Maxim Integrated

Part Name
Description
Manufacturer
DS3508E Datasheet PDF : 14 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
I2C, 8-Channel Gamma Buffer with EEPROM
OUTPUT ELECTRICAL CHARACTERISTICS
(VCC = +2.7V to +5.5V; VDD = 15.5V, TA = -45°C to +95°C, unless otherwise noted.)
PARAMETER
Gamma DAC Resolution
Integral Nonlinearity Error
Differential Nonlinearity Error
Output Voltage Range:
GM1–GM4
SYMBOL
CONDITIONS
TA = +25°C (Note 4)
TA = +25°C (Note 5)
Output Voltage Range:
GM5–GM8
ROUT (GM1–GM8)
Amplifier Offset
ROUT
(Notes 6, 7)
TA = +25°C (Note 8)
MIN
8
-1.25
-0.5
VHM
TYP
MAX
+1.25
+0.5
UNITS
Bits
LSB
LSB
VHH
V
VLL
VLM
V
20
k
-35
+35
mV
I2C ELECTRICAL CHARACTERISTICS
(VCC = +2.7V to +5.5V, TA = -45°C to +95°C, timing referenced to VIL(MAX) and VIH(MIN).) (Figure 4)
PARAMETER
SCL Clock Frequency
Low Period of SCL
High Period of SCL
Bus Free Time Between STOP
and START Conditions
SYMBOL
fSCL
tLOW
tHIGH
CONDITIONS
(Note 9)
Measured at VIL
Measured at VIH
tBUF
MIN TYP
0
1.3
0.6
1.3
START Setup Time
Hold Time (Repeated) START
Condition
Data Hold Time
Data Setup Time
A0 Setup Time
A0 Hold Time
SDA and SCL Rise Time
SDA and SCL Fall Time
STOP Setup Time
SDA and SCL Capacitive
Loading
EEPROM Write Time
SCL Falling Edge to SDA Output
Data Valid
Output Data Hold
tSU:STA
tHD:STA
tHD:DAT
tSU:DAT
tSU:A
tHD:A
tR
tF
tSU:STO
SCL rising through VIH to SDA falling
through VIH
SDA falling through VIL to SCL falling
through VIH
Before START
After STOP
(Note 10)
(Note 10)
CB
(Note 10)
tW
(Note 11)
tAA
SCL falling through VIL to SDA exit
0.3–0.7 x VCC window
tDH
SCL falling through VIL until SDA in
0.3–0.7 x VCC window
0.6
0.6
0
100
0.6
0.6
20 + (0.1 x CB)
20 + (0.1 x CB)
0.6
0
MAX
400
UNITS
kHz
µs
µs
µs
µs
µs
0.9
µs
ns
µs
µs
300
ns
300
ns
µs
400
pF
20
ms
900
ns
ns
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