82093AA View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

82093AA

I/O ADVANCED PROGRAMMABLE INTERRUPT CONTROLLER (IOAPIC)

Intel 

82093AA (IOAPIC)

E

3.2.2. IOAPICVER—IOAPIC VERSION REGISTER

Address Offset:

Default Value:

Attribute:

01h

00170011h

Read Only

The IOAPIC Version Register identifies the APIC hardware version. Software can use this to provide

compatibility between different APIC implementations and their versions. In addition, this register provides the

maximum number of entries in the I/O Redirection Table.

Bit

31:24

23:16

15:8

7:0

Descriptions

Reserved.

Maximum Redirection Entry—RO. This field contains the entry number (0 being the lowest

entry) of the highest entry in the I/O Redirection Table. The value is equal to the number of

interrupt input pins for the IOAPIC minus one. The range of values is 0 through 239. For this

IOAPIC, the value is 17h.

Reserved.

APIC VERSION—RO. This 8 bit field identifies the implementation version. The version number

assigned to the IOAPIC is 11h.

3.2.3. IOAPICARB—IOAPIC ARBITRATION REGISTER

Address Offset:

Default Value:

Attribute:

02h

0000_0000h

Read Only

The APICARB Register contains the bus arbitration priority for the IOAPIC. This register is loaded when the

IOAPIC ID Register is written.

The APIC uses a one wire arbitration to win bus ownership. A rotating priority scheme is used for arbitration. The

winner of the arbitration becomes the lowest priority agent and assumes an arbitration ID of 0.

All other agents, except the agent whose arbitration ID is 15, increment their arbitration IDs by one. The agent

whose ID was 15 takes the winner's arbitration ID and increments it by one. Arbitration IDs are changed

(incremented or asssumed) only for messages that are transmitted successfully (except, in the case of low

priority messages where Arbitration ID is changed even if message was not successfully transmitted). A

message is transmitted successfully if no checksum error or acceptance error is reported for that message. The

APICARB Register is always loaded with IOAPIC ID during a "level triggered INIT with de-assert" message.

Bit

31:28

27:24

23:0

Description

Reserved.

IOAPIC Identification—R/W. This 4 bit field contains the IOAPIC Arbitration ID.

Reserved.

10

PRELIMINARY

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