MTP805N View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

MTP805N

8051 Embedded USB/PS2 Keyboard/Mouse Controller

Unspecified 

MYSON

TECHNOLOGY

MTP805

(Rev. 0.9)

FUNCTIONAL DESCRIPTIONS

1. 8051 CPU Core

MTP805 includes all 8051 functions with the following exceptions:

1.1 PSEN, ALE, #RD and #WR pins are disabled. The external RAM access is restricted to XFRs within the

MTP805.

1.2 Port0, port3.2, port3.3, port3.6 and port3.7 are not general-purpose I/O ports. They are dedicated to

special application.

1.3 #INT0 and #INT1 input pin is not provided, it is connected to special interrupt sources.

1.4 UART and Timer1 are not supported.

Note: All registers listed in this document reside in external RAM area (XFR). For internal RAM memory map

please refer to 8051 spec.

2. Memory Allocation

2.1 Internal Special Function Registers (SFR)

The SFR is a group of registers that are the same as standard 8051.

2.2 Internal RAM

There are total 256 bytes internal RAM in MTP805, same as standard 8052.

2.3 External Special Function Registers (XFR)

The XFR is a group of registers allocated in the 8051 external RAM area 00h - 2Fh. Most of the registers are

used for USB function. Program can initialize Ri value and use "MOVX" instruction to access these registers.

FFh Internal RAM

SFR

Accessible by

indirect

addressing only

(Using

MOV A,@Ri

instruction)

80h

7Fh Internal RAM

Accessible by

direct addressing

Accessible by

direct and indirect

addressing

00h

2Fh

XFR

Accessible by

indirect external

RAM addressing

(Using

MOVX A,@Ri

instruction

00h

Revision 0.9

-4-

2000/07/19

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