MB40568P-SK View Datasheet(PDF) - Fujitsu
Part Name
Description
Manufacturer
MB40568P-SK Datasheet PDF : 24 Pages
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MB40568
s PIN ASSIGNMENTS
D.GND 1
D8 (LSB) 2
D7
3
D6
4
D5
5
D4
6
D3
7
D2
8
D1 (MSB) 9
CLK 10
D.GND 11
(Top view)
22
21
20
19
18
17
16
15
14
13
12
(DIP-22P-M04)
A.GND
VCCD
VCCA
VRB
VINA
VCLMP
VOUTC
VINC
VCCA
VCCD
A.GND
(Top view)
D.GND 1
24
D8 (LSB) 2
23
D7
3
22
D6
4
21
D5
5
20
D4
6
19
D3
7
18
D2
8
17
D1 (MSB) 9
16
CLK 10
15
D.GND 11
14
A.GND 12
13
(FPT-24P-M02)
A.GND
VCCD
VCCA
VRB
VREF
VRM
VINA
VCLMP
VOUTC
VINC
VCCA
VCCD
s PIN DESCRIPTIONS
Pin no.
DIP
SOP
1, 11
1, 11
Symbol
D.GND
2 to 9
10
12, 22
2 to 9
10
12, 24
D8 to D1
CLK
A.GND
13, 21
13, 23
VCCD
14, 20
14, 22
VCCA
15
15
VINC
16
16
VOUTC
Function
Ground pin
Should be connected to the analog system ground.
Digital signal output pin
Clock input pin
Ground pin
Should be connected to the analog system ground.
Power supply voltage input pin
Also functions as VCCA power supply, and should be in the same
voltage level as VCCA pin.
Power supply voltage input pin
Also functions as VCCD power supply, and should be in the same
voltage level as VCCD pin.
Clamp circuit input pin
The clamp circuit is a diode-clamp type sync chip clamp circuit.
Should be shorted to ground if the clamp circuit is not used.
Clamp circuit output pin
A capacitor of at least 1 µF should be connected between this pin
and the VCLMP pin.
Should be left open if the clamp circuit is not used.
(Continued)
2
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