MB40568P-SK View Datasheet(PDF) - Fujitsu

Part Name

Description

Manufacturer

MB40568P-SK

A/D Converter (1-channel, 8-bit low-power model with built-in clamp circuit)

Fujitsu 

MB40568

(Continued)

Pin no.

DIP

SOP

17

17

18

18

19

—

—

19

—

20

—

21

Symbol

Function

VCLMP

VINA

VRB

VRM

VREF

VRB

Clamp voltage output pin

A capacitor of at least 1 µF should be connected between this pin

and the VOUTC pin.

Should be left open if the clamp circuit is not used.

Analog signal input pin

Analog reference voltage pin

In the DIP model, this pin is internally connected to the reference

circuit.

Always be sure that a capacitor is connected immediately next to the

IC, between this pin and the ground. The capacitor must be at least

1 µF with excellent frequency characteristics.

Reference voltage monitor pin

Set to the midpoint of resistance between VCCA and VRB.

Should be left open in normal use.

Reference voltage output pin

Should be left open when no reference voltage source is used.

Analog reference voltage input pin

When an internal reference voltage source is used, this pin should

be shorted to the VREF pin. In this case, always be sure that a

capacitor is connected immediately next to the IC, between this pin

and the ground. The capacitor must be at least 1 µF with excellent

frequency characteristics.

When an external reference voltage source is used, this pin will

carry a current of up to 8.5 mA, therefore it is necessary to use a

voltage source with sufficient sync capacity.

A capacitor connection should also be used similar to that used with

internal reference voltage sources.

3

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